Li Yangyang, Zhu Huilong, Kong Zhenzhen, Zhang Yongkui, Ai Xuezheng, Wang Guilei, Wang Qi, Liu Ziyi, Lu Shunshun, Xie Lu, Huang Weixing, Liu Yongbo, Li Chen, Li Junjie, Lin Hongxiao, Su Jiale, Zeng Chuanbin, Radamson Henry H
Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China.
University of Chinese Academy of Sciences, Beijing 100049, China.
Nanomaterials (Basel). 2021 May 3;11(5):1209. doi: 10.3390/nano11051209.
Gate-all-around (GAA) field-effect transistors have been proposed as one of the most important developments for CMOS logic devices at the 3 nm technology node and beyond. Isotropic etching of silicon-germanium (SiGe) for the definition of nano-scale channels in vertical GAA CMOS and tunneling FETs has attracted more and more attention. In this work, the effect of doping on the digital etching of Si-selective SiGe with alternative nitric acids (HNO) and buffered oxide etching (BOE) was investigated in detail. It was found that the HNO digital etching of SiGe was selective to n-Si, p-Si, and intrinsic Si. Extensive studies were performed. It turned out that the selectivity of SiGe/Si was dependent on the doped types of silicon and the HNO concentration. As a result, at 31.5% HNO concentration, the relative etched amount per cycle (REPC) and the etching selectivity of SiGe for n-Si was identical to that for p-Si. This is particularly important for applications of vertical GAA CMOS and tunneling FETs, which have to expose both the n and p sources/drains at the same time. In addition, the values of the REPC and selectivity were obtained. A controllable etching rate and atomically smooth surface could be achieved, which enhanced carrier mobility.
全栅(GAA)场效应晶体管已被视为3纳米及更先进技术节点的CMOS逻辑器件最重要的发展方向之一。用于垂直GAA CMOS和隧穿场效应晶体管中纳米级沟道定义的硅锗(SiGe)各向同性蚀刻越来越受到关注。在这项工作中,详细研究了掺杂对用交替的硝酸(HNO)和缓冲氧化物蚀刻(BOE)对硅选择性SiGe进行数字蚀刻的影响。发现SiGe的HNO数字蚀刻对n型硅、p型硅和本征硅具有选择性。进行了广泛的研究。结果表明,SiGe/Si的选择性取决于硅的掺杂类型和HNO浓度。因此,在HNO浓度为31.5%时,SiGe对n型硅的每周期相对蚀刻量(REPC)和蚀刻选择性与对p型硅的相同。这对于垂直GAA CMOS和隧穿场效应晶体管的应用尤为重要,因为它们必须同时暴露n型和p型源极/漏极。此外,还获得了REPC和选择性的值。可以实现可控的蚀刻速率和原子级光滑的表面,这提高了载流子迁移率。