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基于硅铪的铁电场效应晶体管阈值电压漂移的实验研究

Experimental study of threshold voltage shift for Si:HfObased ferroelectric field effect transistor.

作者信息

Jung Taehwan, Shin Changhwan

机构信息

Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Republic of Korea.

出版信息

Nanotechnology. 2021 Jun 24;32(37). doi: 10.1088/1361-6528/ac08bc.

DOI:10.1088/1361-6528/ac08bc
PMID:34098542
Abstract

For a given three different Si doping concentrations at room and high temperatures, the threshold voltage shift (Δ) on silicon-doped hafnium-oxide-based ferroelectric field effect transistor (FeFET) is experimentally investigated. It turned out that charge trapping in the gate stack of FeFET (versus polarization switching in the gate stack of FeFET) adversely affects Δ. Charge trapping causes the positive Δ, while polarization switching causes the negative Δ. The dominance of polarization switching is predominantly determined by the total remnant polarization (2), which can be controlled by adjusting Si doping concentration in the hafnium-oxide layer. As the Si doping concentration increases from 2.5% to 3.6%, and 5.0%, 2decreases 19.8C cmto 15.25C cm, and 12.5C cm, which leads to ΔVof -0.8 V, -0.09 V, and +0.1 V, respectively, at room temperature. At high temperature, the effect of polarization switching is degraded due to the decreased, while the effect of charge trapping is very independent of temperature. For those three different Si doping concentrations (i.e. 2.5%, 3.6%, and 5.0%), at the high temperature, Δof FeFET is -0.675 V, -0.075 V, and +0.15 V, respectively. This experimental work should provide an insight for designing FeFET for memory and logic applications.

摘要

对于给定的在室温和高温下的三种不同硅掺杂浓度,对基于硅掺杂氧化铪的铁电场效应晶体管(FeFET)的阈值电压偏移(Δ)进行了实验研究。结果表明,FeFET栅极堆栈中的电荷俘获(相对于FeFET栅极堆栈中的极化切换)对Δ有不利影响。电荷俘获导致正的Δ,而极化切换导致负的Δ。极化切换的主导作用主要由总剩余极化(2)决定,总剩余极化可通过调整氧化铪层中的硅掺杂浓度来控制。随着硅掺杂浓度从2.5%增加到3.6%以及5.0%,2从19.8C/cm²降至15.25C/cm²以及12.5C/cm²,这分别导致室温下的ΔV为-0.8V、-0.09V和+0.1V。在高温下,由于2降低,极化切换的效应会退化,而电荷俘获的效应与温度非常无关。对于这三种不同的硅掺杂浓度(即2.5%、3.6%和5.0%),在高温下,FeFET的Δ分别为-0.675V、-0.075V和+0.15V。这项实验工作应为设计用于存储器和逻辑应用的FeFET提供见解。

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