Samiei Aria, Hashemi Hossein
Ming Hsieh Department of Electrical and Computer Engineering, University of Southern California, Los Angeles, CA 90089 USA.
IEEE J Solid-State Circuits. 2021 Jul;56(7):2142-2157. doi: 10.1109/jssc.2021.3056040. Epub 2021 Feb 9.
We present a 180-nm CMOS bidirectional neural interface system-on-chip that enables simultaneous recording and stimulation with on-chip stimulus artifact cancelers. The front-end cancellation scheme incorporates a least-mean-square engine that adapts the coefficients of a 2-tap infinite-impulse-response filter to replicate the stimulation artifact waveform and subtract it at the front-end. Measurements demonstrate the efficacy of the canceler in mitigating artifacts up to 700 mV and reducing the front-end amplifier saturation recovery time in response to a 2.5 V artifact. Each recording channel houses a pair of adaptive infinite-impulse-response filters, which enable cancellation of the artifacts generated by the simultaneous operation of the 2 on-chip stimulators. The analog front-end consumes 2.5 W of power per channel, has a maximum gain of 50 dB and a bandwidth of 9.0 kHz with 6.2 V integrated input-referred noise.
我们展示了一种180纳米互补金属氧化物半导体双向神经接口片上系统，该系统能够通过片上刺激伪迹消除器实现同步记录和刺激。前端消除方案包含一个最小均方引擎，该引擎可调整两抽头无限脉冲响应滤波器的系数，以复制刺激伪迹波形并在前端将其减去。测量结果表明，该消除器在减轻高达700毫伏的伪迹以及减少响应2.5伏伪迹时前端放大器的饱和恢复时间方面具有有效性。每个记录通道都包含一对自适应无限脉冲响应滤波器，这使得能够消除由两个片上刺激器同时运行产生的伪迹。模拟前端每通道功耗为2.5瓦，最大增益为50分贝，带宽为9.0千赫，集成输入参考噪声为6.2伏。
