Department of Semiconductor Systems Engineering, Korea University, 145 Anam-ro, Seongbuk-gu, Seoul, 02841, Republic of Korea.
Department of Electrical Engineering, Korea University, 145 Anam-ro, Seongbuk-gu, Seoul, 02841, Republic of Korea.
Sci Rep. 2021 Sep 9;11(1):17983. doi: 10.1038/s41598-021-97479-x.
In this study, we fabricated a 2 × 2 one-transistor static random-access memory (1T-SRAM) cell array comprising single-gated feedback field-effect transistors and examined their operation and memory characteristics. The individual 1T-SRAM cell had a retention time of over 900 s, nondestructive reading characteristics of 10,000 s, and an endurance of 10 cycles. The standby power of the individual 1T-SRAM cell was estimated to be 0.7 pW for holding the "0" state and 6 nW for holding the "1" state. For a selected cell in the 2 × 2 1T-SRAM cell array, nondestructive reading of the memory was conducted without any disturbance in the half-selected cells. This immunity to disturbances validated the reliability of the 1T-SRAM cell array.
在这项研究中，我们制作了一个由单栅反馈场效应晶体管组成的 2×2 位静态随机存取存储器（1T-SRAM）单元阵列，并研究了它们的工作和存储特性。单个 1T-SRAM 单元的保持时间超过 900s，非破坏性读取特性为 10000s，且耐用性为 10 个周期。单个 1T-SRAM 单元的备用功率估计为保持“0”状态时为 0.7pW，保持“1”状态时为 6nW。对于 2×2 1T-SRAM 单元阵列中的选定单元，可以在不干扰半选单元的情况下进行非破坏性的存储器读取。这种对干扰的免疫验证了 1T-SRAM 单元阵列的可靠性。
