IEEE Trans Biomed Circuits Syst. 2021 Oct;15(5):877-897. doi: 10.1109/TBCAS.2021.3112756. Epub 2021 Dec 9.
The application of closed-loop approaches in systems neuroscience and therapeutic stimulation holds great promise for revolutionizing our understanding of the brain and for developing novel neuromodulation therapies to restore lost functions. Neural prostheses capable of multi-channel neural recording, on-site signal processing, rapid symptom detection, and closed-loop stimulation are critical to enabling such novel treatments. However, the existing closed-loop neuromodulation devices are too simplistic and lack sufficient on-chip processing and intelligence. In this paper, we first discuss both commercial and investigational closed-loop neuromodulation devices for brain disorders. Next, we review state-of-the-art neural prostheses with on-chip machine learning, focusing on application-specific integrated circuits (ASIC). System requirements, performance and hardware comparisons, design trade-offs, and hardware optimization techniques are discussed. To facilitate a fair comparison and guide design choices among various on-chip classifiers, we propose a new energy-area (E-A) efficiency figure of merit that evaluates hardware efficiency and multi-channel scalability. Finally, we present several techniques to improve the key design metrics of tree-based on-chip classifiers, both in the context of ensemble methods and oblique structures. A novel Depth-Variant Tree Ensemble (DVTE) is proposed to reduce processing latency (e.g., by 2.5× on seizure detection task). We further develop a cost-aware learning approach to jointly optimize the power and latency metrics. We show that algorithm-hardware co-design enables the energy- and memory-optimized design of tree-based models, while preserving a high accuracy and low latency. Furthermore, we show that our proposed tree-based models feature a highly interpretable decision process that is essential for safety-critical applications such as closed-loop stimulation.
闭环方法在系统神经科学和治疗性刺激中的应用有望彻底改变我们对大脑的理解,并开发出新型的神经调节疗法来恢复丧失的功能。能够进行多通道神经记录、现场信号处理、快速症状检测和闭环刺激的神经假体对于实现这些新型治疗方法至关重要。然而,现有的闭环神经调节设备过于简单,缺乏足够的片上处理和智能。在本文中,我们首先讨论了用于脑疾病的商业和研究性闭环神经调节设备。接下来,我们回顾了具有片上机器学习的最先进的神经假体,重点介绍了专用集成电路 (ASIC)。讨论了系统要求、性能和硬件比较、设计权衡以及硬件优化技术。为了便于公平比较和指导各种片上分类器之间的设计选择,我们提出了一个新的能量-面积 (E-A) 效率衡量标准,用于评估硬件效率和多通道可扩展性。最后,我们提出了几种改进基于树的片上分类器关键设计指标的技术,包括在集成方法和斜结构的上下文中。提出了一种新的深度变化树集成 (DVTE) 来减少处理延迟(例如,在癫痫检测任务中减少 2.5 倍)。我们进一步开发了一种成本感知学习方法来联合优化功率和延迟指标。我们表明,算法-硬件协同设计能够实现基于树的模型的能量和内存优化设计,同时保持高精度和低延迟。此外,我们表明,我们提出的基于树的模型具有高度可解释的决策过程,这对于闭环刺激等安全关键应用至关重要。