Abellan Beteta Carlos, Andreou Dimitra, Artuso Marina, Beiter Andy, Blusk Steven, Bugiel Roma, Bugiel Szymon, Carbone Antonio, Carli Ina, Chen Bo, Conti Nadim, De Benedetti Federico, Ding Shuchong, Ely Scott, Firlej Miroslaw, Fiutowski Tomasz, Gandini Paolo, Germann Danielle, Grieser Nathan, Idzik Marek, Jiang Xiaojie, Krupa Wojciech, Li Yiming, Li Zhuoming, Liang Xixin, Liu Shuaiyi, Lu Yu, Mackey Lauren, Moron Jakub, Mountain Ray, Petruzzo Marco, Pham Hang, Schmidt Burkhard, Sheng Shuqi, Spadaro Norella Elisabetta, Swientek Krzysztof, Szumlak Tomasz, Tobin Mark, Wang Jianchun, Wilkinson Michael, Wu Hangyi, Zhang Feihao, Zou Quan
Physik-Institut, University of Zurich, Winterthurerstrasse 190, 8057 Zurich, Switzerland.
Physics Department, Syracuse University, 900 South Crouse Ave, Syracuse, NY 13244, USA.
Sensors (Basel). 2021 Dec 24;22(1):107. doi: 10.3390/s22010107.
SALT, a new dedicated readout Application Specific Integrated Circuit (ASIC) for the Upstream Tracker, a new silicon detector in the Large Hadron Collider beauty (LHCb) experiment, has been designed and developed. It is a 128-channel chip using an innovative architecture comprising a low-power analogue front-end with fast pulse shaping and a 40 MSps 6-bit Analog-to-Digital Converter (ADC) in each channel, followed by a Digital Signal Processing (DSP) block performing pedestal and Mean Common Mode (MCM) subtraction and zero suppression. The prototypes of SALT were fabricated and tested, confirming the full chip functionality and fulfilling the specifications. A signal-to-noise ratio of about 20 is achieved for a silicon sensor with a 12 pF input capacitance. In this paper, the SALT architecture and measurements of the chip performance are presented.
SALT是一种专门为大型强子对撞机美实验(LHCb)中的新型硅探测器——上游追踪器设计和开发的读出专用应用特定集成电路(ASIC)。它是一款128通道芯片,采用了创新架构,包括具有快速脉冲整形功能的低功耗模拟前端以及每个通道中的40 MSps 6位模数转换器(ADC),随后是执行基线和平均共模(MCM)减法以及零抑制的数字信号处理(DSP)模块。SALT的原型已制造并测试,确认了芯片的全部功能并满足规格要求。对于输入电容为12 pF的硅传感器,实现了约20的信噪比。本文介绍了SALT架构和芯片性能测量。