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基于忆阻器交叉开关实现16种布尔逻辑和全加器功能的可重构高效实现,用于超越冯·诺依曼架构的内存计算。

Reconfigurable and Efficient Implementation of 16 Boolean Logics and Full-Adder Functions with Memristor Crossbar for Beyond von Neumann In-Memory Computing.

作者信息

Song Yujie, Wang Xingsheng, Wu Qiwen, Yang Fan, Wang Chengxu, Wang Meiqing, Miao Xiangshui

机构信息

School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan, 430074, China.

Hubei Yangtze Memory Laboratories, Wuhan, 430205, China.

出版信息

Adv Sci (Weinh). 2022 May;9(15):e2200036. doi: 10.1002/advs.202200036. Epub 2022 Mar 27.

DOI:10.1002/advs.202200036
PMID:35343097
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC9130921/
Abstract

The rise of emerging technologies such as Big Data, the Internet of Things, and artificial intelligence, which requires efficient power schemes, is driving brainstorming in data computing and storage technologies. In this study, merely relying on the fundamental structure of two memristors and a resistor, arbitrary Boolean logic can be reconfigured and calculated in two steps, while no additional voltage sources are needed beyond "±V " and 0, and all state reversals are based on memristor set switching. Utilizing the proposed logic scheme in an elegant form of unity structure and minimum cost, the implementation of a 1-bit adder is demonstrated economically, and a promising circuit scheme for the N-bit adder is exhibited. Some critical issues including the crosstalk problem, energy consumption, and peripheral circuits are further simulated and discussed. Compared with existing works on memristive logic, such methods support building a memristor-based digital in-memory calculation system with high functional reconfigurability, simple voltage sources, and low power and area consumption.

摘要

大数据、物联网和人工智能等新兴技术的兴起,需要高效的电源方案,这推动了数据计算和存储技术的头脑风暴。在本研究中,仅依靠两个忆阻器和一个电阻器的基本结构,就可以分两步重新配置和计算任意布尔逻辑,除了“±V”和0之外,不需要额外的电压源,并且所有状态反转都基于忆阻器的设置切换。以统一结构和最低成本的优雅形式利用所提出的逻辑方案,经济地演示了1位加法器的实现,并展示了一种有前景的N位加法器电路方案。进一步模拟和讨论了一些关键问题,包括串扰问题、能耗和外围电路。与现有的忆阻逻辑工作相比,此类方法支持构建具有高功能可重构性、简单电压源以及低功耗和低面积消耗的基于忆阻器的数字内存计算系统。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/533810950c8e/ADVS-9-2200036-g002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/f954a3c67e63/ADVS-9-2200036-g001.jpg
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https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/97f737d6bb7e/ADVS-9-2200036-g006.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/565f17876f4c/ADVS-9-2200036-g004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/dcf20713341d/ADVS-9-2200036-g003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/533810950c8e/ADVS-9-2200036-g002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/f954a3c67e63/ADVS-9-2200036-g001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/72bdb32c98d0/ADVS-9-2200036-g007.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/97f737d6bb7e/ADVS-9-2200036-g006.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/565f17876f4c/ADVS-9-2200036-g004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/dcf20713341d/ADVS-9-2200036-g003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/13ef/9130921/533810950c8e/ADVS-9-2200036-g002.jpg

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本文引用的文献

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