International Research Center for Neurointelligence, The University of Tokyo, Tokyo, 113-0033, Japan.
Department of Electrical Engineering and Information Systems, Graduate School of Engineering, The University of Tokyo, Tokyo, 113-8656, Japan.
Sci Rep. 2022 Jun 14;12(1):9868. doi: 10.1038/s41598-022-13687-z.
Memristive systems and devices are potentially available for implementing reservoir computing (RC) systems applied to pattern recognition. However, the computational ability of memristive RC systems depends on intertwined factors such as system architectures and physical properties of memristive elements, which complicates identifying the key factor for system performance. Here we develop a simulation platform for RC with memristor device networks, which enables testing different system designs for performance improvement. Numerical simulations show that the memristor-network-based RC systems can yield high computational performance comparable to that of state-of-the-art methods in three time series classification tasks. We demonstrate that the excellent and robust computation under device-to-device variability can be achieved by appropriately setting network structures, nonlinearity of memristors, and pre/post-processing, which increases the potential for reliable computation with unreliable component devices. Our results contribute to an establishment of a design guide for memristive reservoirs toward the realization of energy-efficient machine learning hardware.
忆阻系统和设备可用于实现应用于模式识别的储层计算 (RC) 系统。然而,忆阻 RC 系统的计算能力取决于系统架构和忆阻器元件的物理特性等交织因素,这使得确定系统性能的关键因素变得复杂。在这里,我们开发了一个基于忆阻器器件网络的 RC 仿真平台,该平台可用于测试不同的系统设计以提高性能。数值模拟表明,基于忆阻器网络的 RC 系统可以产生与三种时间序列分类任务中的最先进方法相当的高计算性能。我们证明,通过适当设置网络结构、忆阻器的非线性以及预处理和后处理,可以实现器件间变化下的出色和稳健计算,从而增加了使用不可靠组件设备进行可靠计算的潜力。我们的研究结果为忆阻储层的设计提供了指导,有助于实现节能机器学习硬件。