Department of Process Development, Samsung Display, Yongin 17113, South Korea.
Department of Electronic Engineering, Hanyang University, Seoul 04763, South Korea.
ACS Appl Mater Interfaces. 2023 Apr 19;15(15):19137-19151. doi: 10.1021/acsami.3c00038. Epub 2023 Apr 6.
An atomic-layer-deposited oxide nanolaminate (NL) structure with 3 dyads where a single dyad consists of a 2-nm-thick confinement layer (CL) (InGaO or InZnO), and a barrier layer (BL) (GaO) was designed to obtain superior electrical performance in thin-film transistors (TFTs). Within the oxide NL structure, multiple-channel formation was demonstrated by a pile-up of free charge carriers near CL/BL heterointerfaces in the form of the so-called quasi-two-dimensional electron gas (q2DEG), which leads to an outstanding carrier mobility (μ) with band-like transport, steep gate swing (), and positive threshold voltage () behavior. Furthermore, reduced trap densities in oxide NL compared to those of conventional oxide single-layer TFTs ensures excellent stabilities. The optimized device with the InZnO/GaO NL TFT showed remarkable electrical performance: μ of 77.1 ± 0.67 cm/(V s), of 0.70 ± 0.25 V, of 100 ± 10 mV/dec, and of 8.9 × 10 with a low operation voltage range of ≤2 V and excellent stabilities (Δ of +0.27, -0.55, and +0.04 V for PBTS, NBIS, and CCS, respectively). Based on in-depth analyses, the enhanced electrical performance is attributed to the presence of q2DEG formed at carefully engineered CL/BL heterointerfaces. Technological computer-aided design (TCAD) simulation was performed theoretically to confirm the formation of multiple channels in an oxide NL structure where the formation of a q2DEG was verified in the vicinity of CL/BL heterointerfaces. These results clearly demonstrate that introducing a heterojunction or NL structure concept into this atomic layer deposition (ALD)-derived oxide semiconductor system is a very effective strategy to boost the carrier-transporting properties and improve the photobias stability in the resulting TFTs.
设计了一种具有 3 个偶联物的原子层沉积 (ALD) 氧化物纳米层 (NL) 结构,其中每个偶联物由 2nm 厚的限制层 (CL)(InGaO 或 InZnO)和势垒层 (BL)(GaO)组成,以在薄膜晶体管 (TFT) 中获得优异的电学性能。在氧化物 NL 结构中,通过在 CL/BL 异质界面附近堆积自由电荷载流子,形成所谓的准二维电子气 (q2DEG),从而实现了多通道形成,这导致了具有带状输运的出色载流子迁移率 (μ)、陡峭的栅极摆幅 (S) 和正阈值电压 (VT) 行为。此外,与传统氧化物单层 TFT 相比,氧化物 NL 中的陷阱密度降低确保了优异的稳定性。具有 InZnO/GaO NL TFT 的优化器件表现出显著的电性能:μ 为 77.1 ± 0.67cm/(V s),S 为 0.70 ± 0.25V,VT 为 100 ± 10mV/dec,Ion/Ioff 为 8.9×10,操作电压范围低至≤2V,稳定性优异(对于 PBTS、NBIS 和 CCS,分别为+0.27、-0.55 和+0.04V)。通过深入分析,增强的电性能归因于在精心设计的 CL/BL 异质界面处形成的 q2DEG。进行了理论上的技术计算机辅助设计 (TCAD) 模拟,以确认氧化物 NL 结构中多通道的形成,其中在 CL/BL 异质界面附近验证了 q2DEG 的形成。这些结果清楚地表明,将异质结或 NL 结构概念引入这种原子层沉积 (ALD) 衍生的氧化物半导体系统是一种非常有效的策略,可以提高载流子输运性能并改善所得 TFT 的光电偏置稳定性。