Levine Zachary H, Alpert Bradley K, Dagel Amber L, Fowler Joseph W, Jimenez Edward S, Nakamura Nathan, Swetz Daniel S, Szypryt Paul, Thompson Kyle R, Ullom Joel N
National Institute of Standards and Technology, Gaithersburg, MD 20899 USA.
National Institute of Standards and Technology, Boulder, CO 80305 USA.
Microsyst Nanoeng. 2023 Apr 14;9:47. doi: 10.1038/s41378-023-00510-6. eCollection 2023.
We show three-dimensional reconstructions of a region of an integrated circuit from a 130 nm copper process. The reconstructions employ x-ray computed tomography, measured with a new and innovative high-magnification x-ray microscope. The instrument uses a focused electron beam to generate x-rays in a 100 nm spot and energy-resolving x-ray detectors that minimize backgrounds and hold promise for the identification of materials within the sample. The x-ray generation target, a layer of platinum, is fabricated on the circuit wafer itself. A region of interest is imaged from a limited range of angles and without physically removing the region from the larger circuit. The reconstruction is consistent with the circuit's design file.
我们展示了来自130纳米铜制程的集成电路区域的三维重建结果。这些重建采用了x射线计算机断层扫描技术，通过一种新型创新的高倍率x射线显微镜进行测量。该仪器使用聚焦电子束在100纳米的光斑中产生x射线，并配备能量分辨x射线探测器，可最大限度地减少背景干扰，并有望识别样品中的材料。x射线产生靶材是一层铂，它被制造在电路晶圆本身上。从有限的角度范围内对感兴趣的区域进行成像，且无需从较大的电路中物理移除该区域。重建结果与电路的设计文件一致。
