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二维双栅场效应晶体管实现的多功能

2D Dual Gate Field-Effect Transistor Enabled Versatile Functions.

作者信息

Pang Yue, Zhou Yaoqiang, Tong Lei, Xu Jianbin

机构信息

Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong SAR, 999077, China.

出版信息

Small. 2024 Jan;20(2):e2304173. doi: 10.1002/smll.202304173. Epub 2023 Sep 13.

Abstract

Advanced computing technologies such as distributed computing and the Internet of Things require highly integrated and multifunctional electronic devices. Beyond the Si technology, 2D-materials-based dual-gate transistors are expected to meet these demands due to the ultra-thin body and the dangling-bond-free surface. In this work, a molybdenum disulfide (MoS ) asymmetric-dual-gate field-effect transistor (ADGFET) with an In Se top gate and a global bottom gate is designed. The independently controlled double gates enable the device to achieve an on/off ratio of 10 with a low subthreshold swing of 94.3 mV dec while presenting a logic function. The coupling effect between the double gates allows the top gate to work as a charge-trapping layer, realizing nonvolatile memory (10 on/off ratio with retention time over 10 s) and six-level memory states. Additionally, ADGFET displays a tunable photodetection with the responsivity reaching the highest value of 857 A W , benefiting from the interface coupling between the double gates. Meanwhile, the photo-memory property of ADGFET is also verified by using the varying exposure dosages-dependent illumination. The multifunctional applications demonstrate that the ADGFET provides an alternative way to integrate logic, memory, and sensing into one device architecture.

摘要

诸如分布式计算和物联网等先进计算技术需要高度集成且多功能的电子设备。除了硅技术之外,基于二维材料的双栅晶体管由于其超薄体和无悬挂键表面,有望满足这些需求。在这项工作中,设计了一种具有InSe顶栅和全局底栅的二硫化钼(MoS)不对称双栅场效应晶体管(ADGFET)。独立控制的双栅使该器件能够实现10的开/关比,亚阈值摆幅低至94.3 mV/dec,同时呈现逻辑功能。双栅之间的耦合效应使顶栅能够作为电荷俘获层工作,实现非易失性存储器(10的开/关比,保持时间超过10 s)和六级存储状态。此外,得益于双栅之间的界面耦合,ADGFET显示出可调谐的光电探测,响应度达到857 A/W的最高值。同时,通过使用依赖于曝光剂量的光照,也验证了ADGFET的光存储特性。这些多功能应用表明,ADGFET为将逻辑、存储器和传感集成到一个器件架构中提供了一种替代方法。

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