Chen Lixiang, Lu Zhiqi, Fu Chaowei, Bi Ziqiang, Que Miaoling, Sun Jiawei, Sun Yunfei
School of Electronic and Information Engineering, Suzhou University of Science and Technology, Suzhou 215009, China.
Micromachines (Basel). 2024 Jan 5;15(1):101. doi: 10.3390/mi15010101.
In this paper, the degradation behaviors of the ferroelectric gate Gallium nitride (GaN) high electron mobility transistor (HEMT) under positive gate bias stress are discussed. Devices with a gate dielectric that consists of pure Pb(Zr,Ti)O (PZT) and a composite PZT/AlO bilayer are studied. Two different mechanisms, charge trapping and generation of traps, both contribute to the degradation. We have observed positive threshold voltage shift in both kinds of devices under positive gate bias stress. In the devices with a PZT gate oxide, we have found the degradation is owing to electron trapping in pre-existing oxide traps. However, the degradation is caused by electron trapping in pre-existing oxide traps and the generation of traps for the devices with a composite PZT/AlO gate oxide. Owing to the large difference in dielectric constants between PZT and AlO, the strong electric field in the AlO interlayer makes PZT/AlO GaN HEMT easier to degrade. In addition, the ferroelectricity in PZT enhances the electric field in AlO interlayer and leads to more severe degradation. According to this study, it is worth noting that the reliability problem of the ferroelectric gate GaN HEMT may be more severe than the conventional metal-insulator-semiconductor HEMT (MIS-HEMT).
本文讨论了铁电栅氮化镓(GaN)高电子迁移率晶体管(HEMT)在正栅极偏置应力下的退化行为。研究了具有由纯铅锆钛酸铅(PZT)组成的栅极电介质以及复合PZT/AlO双层的器件。电荷俘获和陷阱产生这两种不同机制都对退化有影响。我们观察到在正栅极偏置应力下,这两种器件的阈值电压均正向漂移。在具有PZT栅极氧化物的器件中,我们发现退化是由于电子俘获到预先存在的氧化物陷阱中。然而,对于具有复合PZT/AlO栅极氧化物的器件,退化是由电子俘获到预先存在的氧化物陷阱以及陷阱的产生导致 的。由于PZT和AlO之间介电常数的巨大差异,AlO中间层中的强电场使得PZT/AlO GaN HEMT更容易退化。此外,PZT中的铁电性增强了AlO中间层中的电场并导致更严重的退化。根据这项研究,值得注意的是,铁电栅GaN HEMT的可靠性问题可能比传统的金属 - 绝缘体 - 半导体HEMT(MIS - HEMT)更严重。