Jeong Boyoung, Chung Peter Hayoung, Han Jimin, Noh Taeyun, Yoon Tae-Sik
Graduate School of Semiconductor Materials and Devices Engineering, Ulsan National Institute of Science and Technology, Ulsan 44919, Republic of Korea.
Department of Materials Science and Engineering, Ulsan National Institute of Science and Technology, Ulsan 44919, Republic of Korea.
Nanoscale. 2024 Mar 14;16(11):5737-5749. doi: 10.1039/d3nr06091h.
Artificial synaptic devices have been extensively investigated for neuromorphic computing systems, which require synaptic behaviors mimicking the biological ones. In particular, a highly linear and symmetric weight update with a conductance (or resistance) change for potentiation and depression operation is one of the essential requirements for energy-efficient neuromorphic computing; however, it is not sufficiently met. In this study, a memristor with a Pt/p-LiCoO/p-NiO/Pt structure is investigated, where a low interface energy barrier between the Pt electrode and the NiO layer makes for a more linear and symmetric conductance change. In addition, the use of voltage-driven Li ion redistribution in the NiO layer facilitates the analog conductance change at a low voltage. Besides the linear and symmetric potentiation and depression weight updates, the memristor exhibits various synaptic characteristics such as the dependence of weight update on the pulse amplitude and number, paired pulse facilitation, and short-term and long-term plasticity. The conductance modulation is thought to be induced by a tunable interface energy barrier at the NiO layer and Pt bottom electrode, as a result of Li ion diffusion in NiO supplied from the LiCoO layer and their redistribution. Thanks to the use of Li ion redistribution, the conductance change could be achieved at a voltage <4 V within the time of μs range. These results verify the potential of artificial synapses with the Pt/LiCoO/NiO/Pt memristor operated by voltage-driven Li ion redistribution under the low interface energy barrier conditions, realizing a highly linear and symmetric weight update at a low voltage with a high speed for energy-efficient neuromorphic computing systems.
人工突触器件已被广泛研究用于神经形态计算系统，该系统需要模仿生物突触行为。特别是，对于增强和抑制操作，具有高度线性和对称的权重更新以及电导（或电阻）变化是节能神经形态计算的基本要求之一；然而，目前尚未得到充分满足。在本研究中，对具有Pt/p-LiCoO/p-NiO/Pt结构的忆阻器进行了研究，其中Pt电极与NiO层之间的低界面能垒使得电导变化更加线性和对称。此外，在NiO层中利用电压驱动的锂离子再分布有助于在低电压下实现模拟电导变化。除了线性和对称的增强和抑制权重更新外，该忆阻器还表现出各种突触特性，如权重更新对脉冲幅度和数量的依赖性、双脉冲易化以及短期和长期可塑性。电导调制被认为是由NiO层和Pt底部电极处的可调界面能垒引起的，这是由于从LiCoO层供应到NiO中的锂离子扩散及其再分布所致。由于采用了锂离子再分布，在微秒范围内的时间内，在电压<4 V时即可实现电导变化。这些结果验证了在低界面能垒条件下通过电压驱动锂离子再分布操作的Pt/LiCoO/NiO/Pt忆阻器实现人工突触的潜力，为节能神经形态计算系统在低电压下以高速实现高度线性和对称的权重更新。
