Nikiruy Kristina, Perez Eduardo, Baroni Andrea, Reddy Keerthi Dorai Swamy, Pechmann Stefan, Wenger Christian, Ziegler Martin
Micro- and Nanoelectronic Systems, Department of Electrical Engineering and Information Technology, TU Ilmenau, Ilmenau, Germany.
IHP - Leibniz-Institut fuer innovative Mikroelektronik, Frankfurt/Oder, Germany.
Sci Rep. 2024 Apr 2;14(1):7802. doi: 10.1038/s41598-024-57660-4.
Blooming and pruning is one of the most important developmental mechanisms of the biological brain in the first years of life, enabling it to adapt its network structure to the demands of the environment. The mechanism is thought to be fundamental for the development of cognitive skills. Inspired by this, Chialvo and Bak proposed in 1999 a learning scheme that learns from mistakes by eliminating from the initial surplus of synaptic connections those that lead to an undesirable outcome. Here, this idea is implemented in a neuromorphic circuit scheme using CMOS integrated HfO-based memristive devices. The implemented two-layer neural network learns in a self-organized manner without positive reinforcement and exploits the inherent variability of the memristive devices. This approach provides hardware, local, and energy-efficient learning. A combined experimental and simulation-based parameter study is presented to find the relevant system and device parameters leading to a compact and robust memristive neuromorphic circuit that can handle association tasks.
神经元的生长和修剪是生物大脑在生命最初几年最重要的发育机制之一,使其能够根据环境需求调整其网络结构。该机制被认为是认知技能发展的基础。受此启发,基亚尔沃和巴克在1999年提出了一种学习方案,通过从初始多余的突触连接中消除那些导致不良结果的连接来从错误中学习。在此,该想法通过使用基于CMOS集成HfO的忆阻器件的神经形态电路方案得以实现。所实现的两层神经网络以自组织方式学习,无需正反馈,并利用忆阻器件的固有变异性。这种方法提供了硬件、局部和节能的学习方式。本文进行了基于实验和模拟的联合参数研究,以找到相关的系统和器件参数,从而得到一个紧凑且强大的能够处理关联任务的忆阻神经形态电路。