Hsu Meng-Yin, Liao Chu-Feng, Shih Yi-Hong, Lin Chrong Jung, King Ya-Chin
Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, 300, Taiwan.
Nanoscale Res Lett. 2017 Dec;12(1):418. doi: 10.1186/s11671-017-2191-9. Epub 2017 Jun 15.
This paper reports a novel full logic compatible 4T2R non-volatile static random access memory (nv-SRAM) featuring its self-inhibit data storing mechanism for in low-power/high-speed SRAM application. With compact cell area and full logic compatibility, this new nv-SRAM incorporates two STI-ReRAMs embedded inside the 4T SRAM. Data can be read/write through a cross-couple volatile structure for maintaining fast accessing speed. Data can be non-volatilely stored in new SRAM cell through a unique self-inhibit operation onto the resistive random access memory (RRAM) load, achieving zero static power during data hold.
本文报道了一种新型的全逻辑兼容4T2R非易失性静态随机存取存储器（nv-SRAM），其具有用于低功耗/高速SRAM应用的自抑制数据存储机制。这种新型nv-SRAM具有紧凑的单元面积和全逻辑兼容性，在4T SRAM内部集成了两个STI-ReRAM。数据可以通过交叉耦合的易失性结构进行读/写，以保持快速的访问速度。通过对电阻式随机存取存储器（RRAM）负载进行独特的自抑制操作，数据可以非易失性地存储在新的SRAM单元中，在数据保持期间实现零静态功耗。
