Abe Yuki, Nakada Kazuki, Hagiwara Naruki, Suzuki Eiji, Suda Keita, Mochizuki Shin-Ichiro, Terasaki Yukio, Sasaki Tomoyuki, Asai Tetsuya
Graduate School of Information Science and Technology, Hokkaido University, Kita 14, Nishi 9, Kita-ku, Sapporo, Hokkaido, 0600814, Japan.
Advanced Products Development Center, Technology and Intellectual Property HQ, TDK Corporation, 2-15-17 Higashi-Owada, Ichikawa, Chiba, 2728558, Japan.
Sci Rep. 2024 May 14;14(1):10966. doi: 10.1038/s41598-024-61880-z.
Physical reservoir computing is a promising solution for accelerating artificial intelligence (AI) computations. Various physical systems that exhibit nonlinear and fading-memory properties have been proposed as physical reservoirs. Highly-integrable physical reservoirs, particularly for edge AI computing, has a strong demand. However, realizing a practical physical reservoir with high performance and integrability remains challenging. Herein, we present an analogue circuit reservoir with a simple cycle architecture suitable for complementary metal-oxide-semiconductor (CMOS) chip integration. In several benchmarks and demonstrations using synthetic and real-world data, our developed hardware prototype and its simulator exhibit a high prediction performance and sufficient memory capacity for practical applications, showing promise for future applications in highly integrated AI accelerators.
物理储层计算是加速人工智能(AI)计算的一种很有前景的解决方案。各种具有非线性和衰退记忆特性的物理系统已被提议作为物理储层。对于边缘AI计算而言,高度可集成的物理储层有着强烈需求。然而,实现一个具有高性能和可集成性的实用物理储层仍然具有挑战性。在此,我们展示了一种具有简单循环架构的模拟电路储层,适用于互补金属氧化物半导体(CMOS)芯片集成。在使用合成数据和真实世界数据的多个基准测试和演示中,我们开发的硬件原型及其模拟器展现出了较高的预测性能和足够的存储容量以用于实际应用,这表明其在高度集成的AI加速器未来应用中具有潜力。