Kim Hansol, Woo Sung Yun, Kim Hyungjin
School of Electronic and Electrical Engineering, Kyungpook National University, Daegu 41566, Republic of Korea.
Division of Materials Science and Engineering, Hanyang University, Seoul 04763, Republic of Korea.
Biomimetics (Basel). 2024 May 31;9(6):335. doi: 10.3390/biomimetics9060335.
To mimic the homeostatic functionality of biological neurons, a split-gate field-effect transistor (S-G FET) with a charge trap layer is proposed within a neuron circuit. By adjusting the number of charges trapped in the SiN layer, the threshold voltage (V) of the S-G FET changes. To prevent degradation of the gate dielectric due to program/erase pulses, the gates for read operation and V control were separated through the fin structure. A circuit that modulates the width and amplitude of the pulse was constructed to generate a Program/Erase pulse for the S-G FET as the output pulse of the neuron circuit. By adjusting the V of the neuron circuit, the firing rate can be lowered by increasing the V of the neuron circuit with a high firing rate. To verify the performance of the neural network based on S-G FET, a simulation of online unsupervised learning and classification in a 2-layer SNN is performed. The results show that the recognition rate was improved by 8% by increasing the threshold of the neuron circuit fired.
为了模拟生物神经元的稳态功能,在神经元电路中提出了一种带有电荷俘获层的分裂栅场效应晶体管(S-G FET)。通过调整俘获在SiN层中的电荷量,S-G FET的阈值电压(V)会发生变化。为了防止由于编程/擦除脉冲导致栅极电介质退化,通过鳍式结构将用于读取操作和V控制的栅极分开。构建了一个调制脉冲宽度和幅度的电路,以生成用于S-G FET的编程/擦除脉冲作为神经元电路的输出脉冲。通过调整神经元电路的V,可以通过提高具有高激发率的神经元电路的V来降低激发率。为了验证基于S-G FET的神经网络的性能,在一个2层SNN中进行了在线无监督学习和分类的模拟。结果表明,通过提高激发的神经元电路的阈值,识别率提高了8%。