Shi Weikai, Wang Luyao, Yang Nan
School of Physical Science and Technology, ShanghaiTech University, Shanghai 201210, China.
Materials (Basel). 2024 Jul 8;17(13):3360. doi: 10.3390/ma17133360.
Cerium-based materials (CeO) are of significant interest in the development of vacancy-modulated resistive switching (RS) memory devices. However, the influence of grain boundaries on the performance of memristors is very limited. To fill this gap, this study explores the influence of grain boundaries in cerium-based thin film resistive random-access memory (RRAM) devices. SmCeO (SDC20) thin films were deposited on (100)-oriented Nb-doped SrTiO (NSTO) and (110)-oriented NSTO substrates using pulsed laser deposition (PLD). Devices constructed with a Pt/SDC20/NSTO structure exhibited reversible and stable bipolar resistive switching (RS) behavior. The differences in conduction mechanisms between single-crystal and polycrystalline devices were confirmed, with single-crystal devices displaying a larger resistance window and higher stability. Combining the results of XPS and I-V curve fitting, it was confirmed that defects near the grain boundaries in the SDC-based memristors capture electrons, thereby affecting the overall performance of the RRAM devices.
铈基材料（CeO）在空位调制电阻开关（RS）存储器件的开发中具有重大意义。然而，晶界对忆阻器性能的影响非常有限。为了填补这一空白，本研究探讨了晶界在铈基薄膜电阻随机存取存储器（RRAM）器件中的影响。使用脉冲激光沉积（PLD）将SmCeO（SDC20）薄膜沉积在（100）取向的掺铌钛酸锶（NSTO）和（110）取向的NSTO衬底上。采用Pt/SDC20/NSTO结构构建的器件表现出可逆且稳定的双极电阻开关（RS）行为。证实了单晶器件和多晶器件在传导机制上的差异，单晶器件显示出更大的电阻窗口和更高的稳定性。结合XPS和I-V曲线拟合结果，证实了基于SDC的忆阻器中晶界附近的缺陷捕获电子，从而影响RRAM器件的整体性能。
