Impact of UV annealing on the hole effective mobility in SnO pFET.

Using ultraviolet (UV) annealing through wide energy bandgap HfO/SiO gate dielectric, nanosheet SnO pFET achieved hole effective mobility (µ) from 55 cm/V-s at low hole density (Q) to 13.38 cm/V-s at 5 × 10 cm Q, compared to that of 9.03 cm/V-s at 5 × 10 cm Q for SnO device without UV annealing. This is the highest µ among oxide semiconductor pFETs at high Q, which is required to realize low-power high-density monolithic 3D CMOS logic. This requires excellent surface roughness, good uniformity and free-from grain boundaries that is beyond the thermally-annealed poly-Si. Excellent on-current/off-current (I/I) value of 1.05 × 10 were measured simultaneously in the UV-annealed SnO pFET, which is due to the ultra-thin 8 nm thick SnO nanosheet channel to pinch off the channel leakage. From X-ray photoelectron spectroscopy (XPS) analysis, the 48% µ improvement by UV irradiation is due to increased Sn and decreased Sn. Such high µ at high Q, large I/I, smooth surface, good uniformity and low thermal budget process are the enabling technologies for monolithic 3D CMOS.