Zeng Shi-Hao, Pooja Pheiroijam, Wu Jiancheng, Chin Albert
Electronics Engineering Institute, National Yang Ming Chiao Tung University, Hsinchu, 300, Taiwan.
Sci Rep. 2024 Nov 1;14(1):26256. doi: 10.1038/s41598-024-77581-6.
Using ultraviolet (UV) annealing through wide energy bandgap HfO/SiO gate dielectric, nanosheet SnO pFET achieved hole effective mobility (µ) from 55 cm/V-s at low hole density (Q) to 13.38 cm/V-s at 5 × 10 cm Q, compared to that of 9.03 cm/V-s at 5 × 10 cm Q for SnO device without UV annealing. This is the highest µ among oxide semiconductor pFETs at high Q, which is required to realize low-power high-density monolithic 3D CMOS logic. This requires excellent surface roughness, good uniformity and free-from grain boundaries that is beyond the thermally-annealed poly-Si. Excellent on-current/off-current (I/I) value of 1.05 × 10 were measured simultaneously in the UV-annealed SnO pFET, which is due to the ultra-thin 8 nm thick SnO nanosheet channel to pinch off the channel leakage. From X-ray photoelectron spectroscopy (XPS) analysis, the 48% µ improvement by UV irradiation is due to increased Sn and decreased Sn. Such high µ at high Q, large I/I, smooth surface, good uniformity and low thermal budget process are the enabling technologies for monolithic 3D CMOS.
通过宽能带隙HfO/SiO栅极电介质进行紫外（UV）退火，纳米片SnO pFET实现了空穴有效迁移率（µ）从低空穴密度（Q）下的55 cm²/V-s到5×10¹² cm⁻² Q时的13.38 cm²/V-s，而未进行UV退火的SnO器件在5×10¹² cm⁻² Q时的空穴有效迁移率为9.03 cm²/V-s。这是高Q值下氧化物半导体pFET中最高的µ，这对于实现低功耗高密度单片3D CMOS逻辑是必需的。这需要优异的表面粗糙度、良好的均匀性且无晶界，这超出了热退火多晶硅的性能。在经过UV退火的SnO pFET中同时测量到了优异的开/关电流（Ion/Ioff）值为1.05×10⁷，这归因于8纳米厚的超薄SnO纳米片沟道抑制了沟道泄漏。通过X射线光电子能谱（XPS）分析，UV辐照使µ提高48%是由于Sn⁴⁺增加和Sn²⁺减少。如此高的高Q值下的µ、大的Ion/Ioff、光滑的表面、良好的均匀性以及低热预算工艺是单片3D CMOS的使能技术。
