• 文献检索
  • 文档翻译
  • 深度研究
  • 学术资讯
  • Suppr Zotero 插件Zotero 插件
  • 邀请有礼
  • 套餐&价格
  • 历史记录
应用&插件
Suppr Zotero 插件Zotero 插件浏览器插件Mac 客户端Windows 客户端微信小程序
定价
高级版会员购买积分包购买API积分包
服务
文献检索文档翻译深度研究API 文档MCP 服务
关于我们
关于 Suppr公司介绍联系我们用户协议隐私条款
关注我们

Suppr 超能文献

核心技术专利:CN118964589B侵权必究
粤ICP备2023148730 号-1Suppr @ 2026

文献检索

告别复杂PubMed语法,用中文像聊天一样搜索,搜遍4000万医学文献。AI智能推荐,让科研检索更轻松。

立即免费搜索

文件翻译

保留排版,准确专业,支持PDF/Word/PPT等文件格式,支持 12+语言互译。

免费翻译文档

深度研究

AI帮你快速写综述,25分钟生成高质量综述,智能提取关键信息,辅助科研写作。

立即免费体验

基于现场可编程门阵列(FPGA),利用视网膜皮层算法和粗粒度可重构架构的低光照图像增强技术

FPGA-based low-light image enhancement using Retinex algorithm and coarse-grained reconfigurable architecture.

作者信息

Munaf S, Bharathi A, Jayanthi A N

机构信息

Department of ECE, Sri Ramakrishna Institute of Technology, Coimbatore, India.

Department of Information Technology, Bannari Amman Institute of Technology, Sathyamangalam, India.

出版信息

Sci Rep. 2024 Nov 20;14(1):28770. doi: 10.1038/s41598-024-80339-9.

DOI:10.1038/s41598-024-80339-9
PMID:39567592
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC11579418/
Abstract

Advancements in digital imaging and video processing are often challenged by low-light environments, leading to degraded visual quality. This affects critical sectors such as medical imaging, aerospace, and underwater exploration, where uneven lighting can compromise safety and clarity. To enhance image quality in low-light conditions using a computationally efficient system. This paper introduces an FPGA-based system utilizing the Retinex algorithm for low-light image enhancement, implemented on a Coarse-Grained Reconfigurable Architecture (CGRA). The system is designed using Verilog HDL on a Xilinx FPGA, prioritizing hardware optimization to achieve high-quality outputs with minimal latency. The system achieves a processing rate of 60 frames per second (fps) for images with a resolution of 720 × 576. Quantitative evaluations show a Peak Signal-to-Noise Ratio (PSNR) improvement to 43.18 dB, a Structural Similarity Index (SSIM) of 0.92, and a Mean Squared Error (MSE) reduction, demonstrating significant enhancements in image quality. The design also achieves a low power consumption of 0.186 W and efficient resource utilization, with only 2.2% of Slice LUTs and Slice Registers used. The FPGA-based system demonstrates significant improvements in image quality with high computational efficiency, proving beneficial for critical applications in various sectors.

摘要

数字成像和视频处理技术的进步常常受到低光照环境的挑战,导致视觉质量下降。这影响到医学成像、航空航天和水下探测等关键领域,在这些领域中,光照不均匀会危及安全和清晰度。为了使用计算效率高的系统在低光照条件下提高图像质量,本文介绍了一种基于现场可编程门阵列(FPGA)的系统,该系统利用视网膜皮层算法进行低光照图像增强,并在粗粒度可重构架构(CGRA)上实现。该系统使用Verilog硬件描述语言在赛灵思FPGA上进行设计,优先考虑硬件优化,以实现具有最小延迟的高质量输出。对于分辨率为720×576的图像,该系统实现了每秒60帧(fps)的处理速率。定量评估显示,峰值信噪比(PSNR)提高到43.18dB,结构相似性指数(SSIM)为0.92,均方误差(MSE)降低,表明图像质量有显著提高。该设计还实现了0.186W的低功耗和高效的资源利用率,仅使用了2.2%的Slice LUT和Slice寄存器。基于FPGA的系统在图像质量上有显著提高,且计算效率高,证明对各个领域的关键应用有益。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/7d941c8d3ac6/41598_2024_80339_Fig12_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/91a18b511daa/41598_2024_80339_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/71f491948059/41598_2024_80339_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/4d8ec92d1b70/41598_2024_80339_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/f4ce679a41aa/41598_2024_80339_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/73c07e941880/41598_2024_80339_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/32bb5cf7d72f/41598_2024_80339_Fig6_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/b7387593a9bd/41598_2024_80339_Fig7_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/5f93ca367fa6/41598_2024_80339_Fig8_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/aebc73f821a4/41598_2024_80339_Fig9_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/dba592f36544/41598_2024_80339_Fig10_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/a3c7f6658213/41598_2024_80339_Fig11_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/7d941c8d3ac6/41598_2024_80339_Fig12_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/91a18b511daa/41598_2024_80339_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/71f491948059/41598_2024_80339_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/4d8ec92d1b70/41598_2024_80339_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/f4ce679a41aa/41598_2024_80339_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/73c07e941880/41598_2024_80339_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/32bb5cf7d72f/41598_2024_80339_Fig6_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/b7387593a9bd/41598_2024_80339_Fig7_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/5f93ca367fa6/41598_2024_80339_Fig8_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/aebc73f821a4/41598_2024_80339_Fig9_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/dba592f36544/41598_2024_80339_Fig10_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/a3c7f6658213/41598_2024_80339_Fig11_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ba5e/11579418/7d941c8d3ac6/41598_2024_80339_Fig12_HTML.jpg

相似文献

1
FPGA-based low-light image enhancement using Retinex algorithm and coarse-grained reconfigurable architecture.基于现场可编程门阵列(FPGA),利用视网膜皮层算法和粗粒度可重构架构的低光照图像增强技术
Sci Rep. 2024 Nov 20;14(1):28770. doi: 10.1038/s41598-024-80339-9.
2
A new hardware-efficient algorithm and reconfigurable architecture for image contrast enhancement.一种新的硬件高效算法和可重构架构,用于图像对比度增强。
IEEE Trans Image Process. 2014 Oct;23(10):4426-37. doi: 10.1109/TIP.2014.2348869. Epub 2014 Aug 18.
3
Retinex theory-based nonlinear luminance enhancement and denoising for low-light endoscopic images.基于 Retinex 理论的低光照内窥镜图像非线性亮度增强与去噪。
BMC Med Imaging. 2024 Aug 9;24(1):207. doi: 10.1186/s12880-024-01386-2.
4
FPGA implementation for real-time background subtraction based on Horprasert model.基于 Horprasert 模型的实时背景减除的 FPGA 实现。
Sensors (Basel). 2012;12(1):585-611. doi: 10.3390/s120100585. Epub 2012 Jan 5.
5
A Retinex-based network for image enhancement in low-light environments.基于 Retinex 的低光照环境图像增强网络。
PLoS One. 2024 May 24;19(5):e0303696. doi: 10.1371/journal.pone.0303696. eCollection 2024.
6
UArch: A Super-Resolution Processor With Heterogeneous Triple-Core Architecture for Workloads of U-Net Networks.UArch:一种具有异构三核架构的超分辨率处理器,适用于 U-Net 网络的工作负载。
IEEE Trans Biomed Circuits Syst. 2023 Jun;17(3):633-647. doi: 10.1109/TBCAS.2023.3261060. Epub 2023 Jul 12.
7
Accelerating GRAPPA reconstruction using SoC design for real-time cardiac MRI.利用 SoC 设计加速 GRAPPA 重建,实现实时心脏 MRI。
Comput Biol Med. 2023 Jun;160:107008. doi: 10.1016/j.compbiomed.2023.107008. Epub 2023 May 4.
8
An Efficient YOLO Algorithm with an Attention Mechanism for Vision-Based Defect Inspection Deployed on FPGA.一种基于注意力机制的高效YOLO算法,用于基于视觉的缺陷检测并部署在FPGA上。
Micromachines (Basel). 2022 Jun 30;13(7):1058. doi: 10.3390/mi13071058.
9
Hardware Accelerated Design of a Dual-Mode Refocusing Algorithm for SAR Imaging Systems.硬件加速设计一种用于 SAR 成像系统的双模式重聚焦算法。
Sensors (Basel). 2023 Feb 14;23(4):2143. doi: 10.3390/s23042143.
10
Image reconstruction using UNET-transformer network for fast and low-dose PET scans.基于 UNET-Transformer 网络的快速低剂量 PET 扫描图像重建。
Comput Med Imaging Graph. 2023 Dec;110:102315. doi: 10.1016/j.compmedimag.2023.102315. Epub 2023 Nov 23.

引用本文的文献

1
An effective lossless compression method for attitude data with implementation on FPGA.一种用于姿态数据的高效无损压缩方法及其在现场可编程门阵列(FPGA)上的实现
Sci Rep. 2025 Apr 21;15(1):13809. doi: 10.1038/s41598-025-98372-7.

本文引用的文献

1
Structure-Revealing Low-Light Image Enhancement Via Robust Retinex Model.基于鲁棒反射率模型的结构揭示微光图像增强方法
IEEE Trans Image Process. 2018 Jun;27(6):2828-2841. doi: 10.1109/TIP.2018.2810539.