Park JaeHyeong, Kim Hyo-Bae, Yu Sang Min, Kim Kihwan, Baeck Ju Heyuck, Noh Jiyong, Park Kwon-Shik, Yoon Soo-Young, Ahn Ji-Hoon, Oh Saeroonter
Department of Electrical and Electronic Engineering, Hanyang University, Ansan, 15588, Korea.
Department of Semiconductor Convergence Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
Sci Rep. 2025 Jul 2;15(1):23113. doi: 10.1038/s41598-025-07995-3.
Enhancing the drive current of oxide semiconductor transistors is crucial for enabling high-resolution displays with thin bezels and improving memory write and access speeds. High-mobility channel materials boost drive current but typically require stricter process control and reliability, presenting mass-production challenges compared to stable materials like InGaZnO. Therefore, increasing drive current without changing the channel material is a desirable goal to pursue. One approach is to enhance gate capacitance using high-κ gate dielectrics. In this study, we systematically investigate the impact of high-κ gate dielectrics on the performance of InGaZnO transistors, focusing on three different gate insulators: SiO, HfO, and ZrO. Experimental results show that as the dielectric constant increases from 3.9 (SiO) to 17 (HfO) and 30 (ZrO), the drive current is enhanced by factors of 2.8 and 7, respectively-less than the expected enhancement from κ alone. Device simulations reveal that contact resistance, channel capacitance, and interface trap density all influence the drive current. Notably, interface traps emerge as the primary limiting factor, particularly in HfO, significantly degrading the transconductance. Utilizing the single-pulse charge pumping method, we quantify interface trap densities and demonstrate that reducing interface traps is essential in fully leveraging high-κ gate dielectrics to enhance drive current.
提高氧化物半导体晶体管的驱动电流对于实现窄边框高分辨率显示器以及提高存储器写入和访问速度至关重要。高迁移率沟道材料可提高驱动电流，但通常需要更严格的工艺控制和可靠性，与诸如铟镓锌氧化物（InGaZnO）等稳定材料相比，这给大规模生产带来了挑战。因此，在不改变沟道材料的情况下增加驱动电流是一个值得追求的目标。一种方法是使用高κ栅极电介质来提高栅极电容。在本研究中，我们系统地研究了高κ栅极电介质对InGaZnO晶体管性能的影响，重点关注三种不同的栅极绝缘体：SiO、HfO和ZrO。实验结果表明，随着介电常数从3.9（SiO）增加到17（HfO）和30（ZrO），驱动电流分别提高了2.8倍和7倍，低于仅由κ预期的增强倍数。器件模拟表明，接触电阻、沟道电容和界面陷阱密度都会影响驱动电流。值得注意的是，界面陷阱成为主要限制因素，尤其是在HfO中，会显著降低跨导。利用单脉冲电荷泵浦方法，我们量化了界面陷阱密度，并证明减少界面陷阱对于充分利用高κ栅极电介质来提高驱动电流至关重要。
