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用于片上集成的硅基水平纳米等离子体狭缝波导。

Silicon-based horizontal nanoplasmonic slot waveguides for on-chip integration.

作者信息

Zhu Shiyang, Liow T Y, Lo G Q, Kwong D L

机构信息

Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), Singapore.

出版信息

Opt Express. 2011 Apr 25;19(9):8888-902. doi: 10.1364/OE.19.008888.

Abstract

Horizontal metal/insulator/Si/insulator/metal nanoplasmonic slot waveguide (PWG), which is inserted in a conventional Si wire waveguide, is fabricated using the standard Si-CMOS technology. A thin insulator between the metal and the Si core plays a key role: it not only increases the propagation distance as the theoretical prediction, but also prevents metal diffusion and/or metal-Si reaction. Cu-PWGs with the Si core width of ~134-21 nm and ~12-nm-thick SiO2 on each side exhibit a relatively low propagation loss of ~0.37-0.63 dB/µm around the telecommunication wavelength of 1550 nm, which is ~2.6 times smaller than the Al-counterparts. A simple tapered coupler can provide an effective coupling between the PWG and the conventional Si wire waveguide. The coupling efficiency as high as ~0.1-0.4 dB per facet is measured. The PWG allows a sharp bending. The pure bending loss of a Cu-PWG direct 90° bend is measured to be ~0.6-1.0 dB. These results indicate the potential for seamless integration of various functional nanoplasmonic devices in existing Si electronic photonic integrated circuits (Si-EPICs).

摘要

水平金属/绝缘体/硅/绝缘体/金属纳米等离子体狭缝波导(PWG)插入传统硅线波导中,采用标准硅互补金属氧化物半导体(Si-CMOS)技术制造。金属与硅芯之间的薄绝缘体起着关键作用:它不仅如理论预测的那样增加了传播距离,还防止了金属扩散和/或金属与硅的反应。硅芯宽度约为134 - 21纳米且两侧各有12纳米厚二氧化硅的铜基PWG在1550纳米电信波长附近表现出相对较低的传播损耗,约为0.37 - 0.63分贝/微米,这比铝基同类波导小约2.6倍。一个简单的锥形耦合器可以在PWG与传统硅线波导之间提供有效的耦合。测得的耦合效率高达每面约0.1 - 0.4分贝。PWG允许急剧弯曲。测得铜基PWG直接90°弯曲的纯弯曲损耗约为0.6 - 1.0分贝。这些结果表明在现有的硅电子光子集成电路(Si-EPICs)中无缝集成各种功能性纳米等离子体器件的潜力。

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