Ningbo Institute of Material Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, People's Republic of China.
Nano Lett. 2011 Sep 14;11(9):3987-90. doi: 10.1021/nl202368z. Epub 2011 Aug 22.
A novel double-in-plane gate oxide-based electric-double-layer (EDL) transistor structure applicable to thin-film transistors (TFTs) and nanoscale transistors (nanoFETs) is proposed. An equivalent circuit model is provided to illustrate the operation mechanism. The double-in-plane gate structure can simplify device fabrication effectively and provide unique tunability of threshold. Specifically, the gate bias modulates the threshold voltage of TFT and nanoFET and effectively controls the transistor subthreshold swing and leakage current. Moreover, the EDL gate dielectric can lead to a high gate dielectric capacitance (>1 μF/cm(2)). These simulation results provide basic understanding needed to use and control EDL TFTs and nanoFETs in a novel manner.
提出了一种适用于薄膜晶体管（TFT）和纳米尺度晶体管（nanoFET）的新型平面内双栅氧化层双层电介质（EDL）晶体管结构。提供了一个等效电路模型来说明其工作机制。该双平面栅结构可以有效地简化器件制造，并提供独特的阈值可调性。具体来说，栅极偏压可以调节 TFT 和 nanoFET 的阈值电压，有效地控制晶体管亚阈值摆幅和漏电流。此外，EDL 栅介质可以导致高栅介质电容（>1 μF/cm(2)）。这些模拟结果提供了以新颖的方式使用和控制 EDL TFT 和 nanoFET 所需的基本理解。
