• 文献检索
  • 文档翻译
  • 深度研究
  • 学术资讯
  • Suppr Zotero 插件Zotero 插件
  • 邀请有礼
  • 套餐&价格
  • 历史记录
应用&插件
Suppr Zotero 插件Zotero 插件浏览器插件Mac 客户端Windows 客户端微信小程序
定价
高级版会员购买积分包购买API积分包
服务
文献检索文档翻译深度研究API 文档MCP 服务
关于我们
关于 Suppr公司介绍联系我们用户协议隐私条款
关注我们

Suppr 超能文献

核心技术专利:CN118964589B侵权必究
粤ICP备2023148730 号-1Suppr @ 2026

文献检索

告别复杂PubMed语法,用中文像聊天一样搜索,搜遍4000万医学文献。AI智能推荐,让科研检索更轻松。

立即免费搜索

文件翻译

保留排版,准确专业,支持PDF/Word/PPT等文件格式,支持 12+语言互译。

免费翻译文档

深度研究

AI帮你快速写综述,25分钟生成高质量综述,智能提取关键信息,辅助科研写作。

立即免费体验

由经HPO处理的微孔SiO栅控的低压自组装氧化铟锡薄膜晶体管

Low-voltage self-assembled indium tin oxide thin-film transistors gated by microporous SiO treated by HPO.

作者信息

Dou Wei, Tan Yuanyuan

机构信息

Key Laboratory of Low Dimensional Quantum Structures and Quantum Control, Hunan Normal University Changsha 410081 People's Republic of China

Hunan First Normal University Changsha 410205 People's Republic of China.

出版信息

RSC Adv. 2019 Sep 27;9(53):30715-30719. doi: 10.1039/c9ra07166k. eCollection 2019 Sep 26.

DOI:10.1039/c9ra07166k
PMID:35529372
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC9072221/
Abstract

Ultralow-voltage (0.8 V) thin-film transistors (TFTs) using self-assembled indium-tin-oxide (ITO) as the semiconducting layer and microporous SiO immersed in 5% HPO for 30 minutes with huge electric-double-layer (EDL) capacitance as the gate dielectric are fabricated at room temperature. The huge EDL specific capacitance is 8.2 μF cm at 20 Hz, and about 0.7 μF cm even at 1 MHz. Both enhancement mode ( = 0.15 V) and depletion mode ( = -0.26 V) operation are realized by controlling the thickness of the self-assembled ITO semiconducting layer. Electrical characteristics with the equivalent field-effect mobility of 65.4 cm V s, current on/off ratio of 2 × 10, and subthreshold swing of 80 mV per decade are demonstrated, which are promising for fast-switching and low-power electronics on temperature-sensitive substrates.

摘要

室温下制备了超低压(0.8 V)薄膜晶体管(TFT),其使用自组装氧化铟锡(ITO)作为半导体层,以及浸泡在5% HPO中30分钟的具有巨大双电层(EDL)电容的微孔SiO作为栅极电介质。巨大的EDL比电容在20 Hz时为8.2 μF/cm²,甚至在1 MHz时约为0.7 μF/cm²。通过控制自组装ITO半导体层的厚度,实现了增强模式(阈值电压 = 0.15 V)和耗尽模式(阈值电压 = -0.26 V)操作。展示了等效场效应迁移率为65.4 cm²/V·s、电流开/关比为2×10⁶以及亚阈值摆幅为每十倍频程80 mV的电学特性,这对于在温度敏感基板上的快速开关和低功耗电子器件具有前景。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/354f3f961ebb/c9ra07166k-f4.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/ffc820983609/c9ra07166k-f1.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/1efe0641b6cc/c9ra07166k-f2.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/b33d14412e6b/c9ra07166k-f3.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/354f3f961ebb/c9ra07166k-f4.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/ffc820983609/c9ra07166k-f1.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/1efe0641b6cc/c9ra07166k-f2.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/b33d14412e6b/c9ra07166k-f3.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/888c/9072221/354f3f961ebb/c9ra07166k-f4.jpg

相似文献

1
Low-voltage self-assembled indium tin oxide thin-film transistors gated by microporous SiO treated by HPO.由经HPO处理的微孔SiO栅控的低压自组装氧化铟锡薄膜晶体管
RSC Adv. 2019 Sep 27;9(53):30715-30719. doi: 10.1039/c9ra07166k. eCollection 2019 Sep 26.
2
Dual-gate low-voltage transparent electric-double-layer thin-film transistors with a top gate for threshold voltage modulation.具有用于阈值电压调制的顶栅的双栅极低压透明电双层薄膜晶体管。
RSC Adv. 2020 Mar 3;10(14):8093-8096. doi: 10.1039/c9ra10619g. eCollection 2020 Feb 24.
3
Transparent Thin-Film Transistors Based on Sputtered Electric Double Layer.基于溅射双电层的透明薄膜晶体管
Materials (Basel). 2017 Apr 20;10(4):429. doi: 10.3390/ma10040429.
4
Flexible electric-double-layer thin film transistors based on a vertical InGaZnO channel.基于垂直铟镓锌氧化物沟道的柔性双电层薄膜晶体管。
RSC Adv. 2021 May 18;11(29):17910-17913. doi: 10.1039/d1ra02155a. eCollection 2021 May 13.
5
Junctionless Thin-Film Transistors Gated by an H₃PO₄-Incorporated Chitosan Proton Conductor.由含磷酸的壳聚糖质子导体门控的无结薄膜晶体管
J Nanosci Nanotechnol. 2018 Apr 1;18(4):2910-2913. doi: 10.1166/jnn.2018.14399.
6
Low-Voltage Solution-Processed Zinc-Doped CuI Thin Film Transistors with NOR Logic and Artificial Synaptic Function.具有或非逻辑和人工突触功能的低压溶液法制备的锌掺杂碘化亚铜薄膜晶体管
Nanomaterials (Basel). 2023 Aug 15;13(16):2345. doi: 10.3390/nano13162345.
7
Ion-dependent gate dielectric characteristics of ion-conducting SiO(2) solid-electrolytes in oxide field-effect transistors.氧化物场效应晶体管中离子导电SiO₂固体电解质的离子依赖型栅极介电特性
Phys Chem Chem Phys. 2014 Apr 28;16(16):7455-60. doi: 10.1039/c3cp55056g.
8
Ultralow-Thermal-Budget-Driven IWO-Based Thin-Film Transistors and Application Explorations.基于超低热预算驱动的基于改进灰狼优化算法的薄膜晶体管及其应用探索
Nanomaterials (Basel). 2022 Sep 19;12(18):3243. doi: 10.3390/nano12183243.
9
A Sputtered Silicon Oxide Electrolyte for High-Performance Thin-Film Transistors.用于高性能薄膜晶体管的溅射氧化硅电解质
Sci Rep. 2017 Apr 11;7(1):809. doi: 10.1038/s41598-017-00939-6.
10
Low-voltage protonic/electronic hybrid indium zinc oxide synaptic transistors on paper substrates.基于纸质衬底的低电压质子/电子混合氧化锌突触晶体管。
Nanotechnology. 2014 Mar 7;25(9):094001. doi: 10.1088/0957-4484/25/9/094001. Epub 2014 Feb 12.

引用本文的文献

1
Dual-gate low-voltage transparent electric-double-layer thin-film transistors with a top gate for threshold voltage modulation.具有用于阈值电压调制的顶栅的双栅极低压透明电双层薄膜晶体管。
RSC Adv. 2020 Mar 3;10(14):8093-8096. doi: 10.1039/c9ra10619g. eCollection 2020 Feb 24.

本文引用的文献

1
Solution-deposited sodium beta-alumina gate dielectrics for low-voltage and transparent field-effect transistors.
Nat Mater. 2009 Nov;8(11):898-903. doi: 10.1038/nmat2560. Epub 2009 Oct 18.
2
High performance solution-processed indium oxide thin-film transistors.高性能溶液法制备的氧化铟薄膜晶体管。
J Am Chem Soc. 2008 Sep 24;130(38):12580-1. doi: 10.1021/ja804262z. Epub 2008 Aug 29.
3
Ion gel gated polymer thin-film transistors.离子凝胶门控聚合物薄膜晶体管。
J Am Chem Soc. 2007 Apr 18;129(15):4532-3. doi: 10.1021/ja070875e. Epub 2007 Mar 24.
4
Stable, solution-processed, high-mobility ZnO thin-film transistors.稳定的、溶液法制备的、高迁移率氧化锌薄膜晶体管。
J Am Chem Soc. 2007 Mar 14;129(10):2750-1. doi: 10.1021/ja068876e. Epub 2007 Feb 14.
5
Organic nanodielectrics for low voltage carbon nanotube thin film transistors and complementary logic gates.用于低压碳纳米管薄膜晶体管和互补逻辑门的有机纳米电介质。
J Am Chem Soc. 2005 Oct 12;127(40):13808-9. doi: 10.1021/ja0553203.
6
Unification of the hole transport in polymeric field-effect transistors and light-emitting diodes.聚合物场效应晶体管和发光二极管中空穴传输的统一
Phys Rev Lett. 2003 Nov 21;91(21):216601. doi: 10.1103/PhysRevLett.91.216601. Epub 2003 Nov 19.