gineering Product Development Pillar, Singapore University of Technology and Design, 20 Dover Drive, Singapore 138682, Singapore.
Nanotechnology. 2011 Nov 11;22(45):455702. doi: 10.1088/0957-4484/22/45/455702. Epub 2011 Oct 13.
We apply our understanding of the physics of failure in the post-breakdown regime of high-κ dielectric-based conventional logic transistors having a metal-insulator-semiconductor (MIS) structure to interpret the mechanism of resistive switching in resistive random-access memory (RRAM) technology metal-insulator-metal (MIM) stacks. Oxygen vacancies, gate metal migration and metal filament formation in the gate dielectric which constitute the chemistry of breakdown in the post-breakdown stage of logic gate stacks are attributed to be the mechanisms responsible for the SET process in RRAM technology. In this paper, we draw an analogy between the breakdown study in logic devices and filamentation physics in resistive non-volatile memory.
我们将我们对高k 介电常数基于金属-绝缘体-半导体（MIS）结构的传统逻辑晶体管击穿后区域物理的理解应用于解释金属-绝缘体-金属（MIM）堆叠的电阻式随机存取存储器（RRAM）技术中的电阻开关机制。在逻辑栅堆叠的击穿后阶段，构成击穿化学的氧空位、栅极金属迁移和栅介质中的金属丝形成被归因于RRAM 技术中 SET 过程的机制。在本文中，我们在逻辑器件的击穿研究和电阻型非易失性存储器的细丝化物理之间进行类比。
