Department of Chemical and Biomolecular Engineering, National University of Singapore, 4 Engineering Drive 4, 117576, Singapore.
Nanoscale. 2012 Apr 7;4(7):2296-300. doi: 10.1039/c2nr12134d. Epub 2012 Feb 29.
We demonstrate the controlled fabrication of aggregates of gold nanoparticles as a means of enhancing the charge-storage capacity of metal-insulator-semiconductor (MIS) devices by up to 300% at a low biasing voltage of ±4 V. Aggregates of citrate stabilized gold nanoparticles were obtained by directed electrostatic self-assembly onto an underlying nanopattern of positively charged centers. The underlying nanopatterns consist of amine functionalized gold nanoparticle arrays formed using amphiphilic diblock copolymer reverse micelles as templates. The hierarchical self-organization leads to a twelve-fold increase in the number density of the gold nanoparticles and therefore significantly increases the charge storage centers for the MIS device. The MIS structure showed counterclockwise C-V hysteresis curves indicating a good memory effect. A memory window of 1 V was obtained at a low biasing voltage of ±4 V. Furthermore, C-t measurements conducted after applying a charging bias of 4 V showed that the charge was retained beyond 20,000 s. The proposed strategy can be readily adapted for fabricating next generation solution processible non-volatile memory devices.
我们通过控制金纳米颗粒聚集体的制备,实现了金属-绝缘体-半导体(MIS)器件的电荷存储能力的提高,在低偏置电压 ±4 V 下提高了 300%。通过静电自组装将柠檬酸稳定的金纳米颗粒聚集体定向组装到带正电荷中心的下伏纳米图案上。下伏纳米图案由两亲性嵌段共聚物反胶束作为模板形成的胺功能化金纳米粒子阵列组成。这种分层自组装导致金纳米粒子的数密度增加了 12 倍,因此显著增加了 MIS 器件的电荷存储中心。MIS 结构显示出非理想的 C-V 滞后曲线,表明具有良好的记忆效应。在低偏置电压 ±4 V 下获得了 1 V 的存储窗口。此外,在施加 4 V 的充电偏置后进行的 C-t 测量表明,电荷在 20,000 s 后仍能保持。所提出的策略可以很容易地适应下一代可溶液处理的非易失性存储器件的制造。