Nanoelectronics Cluster, MIMOS Berhad, Technology Park Malaysia, Kuala Lumpur 57000, Malaysia.
Nanoscale Res Lett. 2012 Jun 6;7(1):288. doi: 10.1186/1556-276X-7-288.
A new method of fabricating high aspect ratio nanostructures in silicon without the use of sub-micron lithographic technique is reported. The proposed method comprises two important steps including the use of CMOS spacer technique to form silicon nitride nanostructure masking followed by deep reactive ion etching (DRIE) of the silicon substrate to form the final silicon nanostructures. Silicon dioxide is used as the sacrificial layer to form the silicon nitride nanostructures. With DRIE a high etch selectivity of 50:1 between silicon and silicon nitride was achieved. The use of the spacer technique is particularly advantageous where self-aligned nanostructures with potentially unlimited lengths are formed without the need of submicron lithographic tools and resist materials. With this method, uniform arrays of 100 nm silicon nanostructures which are at least 4 μm tall with aspect ratio higher than 40 were successfully fabricated.
本文报道了一种在不使用亚微米光刻技术的情况下在硅中制造高纵横比纳米结构的新方法。该方法包括两个重要步骤，包括使用 CMOS 间隔技术形成氮化硅纳米结构掩模，然后对硅衬底进行深反应离子刻蚀（DRIE）以形成最终的硅纳米结构。二氧化硅用作牺牲层以形成氮化硅纳米结构。通过 DRIE，硅和氮化硅之间的蚀刻选择性达到了 50:1。间隔技术的使用特别有利，因为可以在不需要亚微米光刻工具和抗蚀剂材料的情况下形成具有潜在无限长度的自对准纳米结构。使用这种方法，成功制造了至少 4μm 高、纵横比高于 40 的均匀的 100nm 硅纳米结构阵列。
