Jin Joo-Young, Yoo Seung-Hyun, Yoo Byung-Wook, Kim Yong-Kweon
School of Electrical Engineering and Computer Science, Seoul National University, Seoul, 151-744, South Korea.
J Nanosci Nanotechnol. 2012 Jul;12(7):5252-62. doi: 10.1166/jnn.2012.6353.
We propose a vacuum wafer-level packaging (WLP) process using glass-reflowed silicon via for nano/micro devices (NMDs). A through-wafer interconnection (TWIn) substrate with silicon vias and reflowed glass is introduced to accomplish a vertical feed-through of device. NMDs are fabricated in the single crystal silicon (SCS) layer which is formed on the TWIn substrate by Au eutectic bonding including Cr adhesion layer. The WLPof the devices is achieved with the capping glass wafer anodically bonded to the SCS layer. In order to demonstrate the successful hermetic packaging, we fabricated the micro-Pirani gauge in the SCS layer, and packaged it in the wafer-level. The vacuum level inside the packaging was measured to be 3.1 Torr with +/- 0.12 Torr uncertainty, and the packaging leakage was not detected during 24 hour after the packaging.
我们提出了一种用于纳米/微器件（NMD）的采用玻璃回流硅通孔的真空晶圆级封装（WLP）工艺。引入了一种带有硅通孔和回流玻璃的穿通晶圆互连（TWIn）衬底，以实现器件的垂直馈通。NMD在通过包括Cr粘附层的Au共晶键合形成于TWIn衬底上的单晶硅（SCS）层中制造。通过将盖玻片阳极键合到SCS层来实现器件的WLP。为了证明成功的气密封装，我们在SCS层中制造了微型皮拉尼真空规，并在晶圆级进行封装。测得封装内部的真空度为3.1托，不确定度为±0.12托，并且在封装后的24小时内未检测到封装泄漏。
