累积模式p沟道环绕栅FinFET的低温性能

Low-temperature performance of accumulation-mode p-channel wrap-gated FinFETs.

作者信息

Zhang Yanbo, Du Yandong, Chen Yankun, Lil Xiaoming, Yang Xiang, Han Weihua, Yang Fuhua

机构信息

Engineering Research Center for Semiconductor Integration Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China.

出版信息

J Nanosci Nanotechnol. 2013 Feb;13(2):804-7. doi: 10.1166/jnn.2013.6074.

DOI:10.1166/jnn.2013.6074

PMID:23646519

Abstract

In this work, accumulation-mode (AM) p-channel wrap-gated FinFETs and AM p-channel planar FETs are fabricated using top-down strategies, and compared in performance at temperatures from 6 K to 295 K. The threshold voltage variation of the AM wrap-gated FinFET is slightly larger than that of the AM planar FET. The drain current and the peak transconductance in the AM wrap-gated FinFET are larger than those in the AM planar FET, and those differences are temperature dependent. We attribute those to the body current enhancement in the AM wrap-gated FinFET as temperature increases. The subthreshold swings (SS) of both types of the FETs improve with temperature decreasing and get lower than 10 mV/dec at 6 K. The higher SS in the AM wrap-gated FinFET is likely due to a high interface state density at the fin sidewalls arising from the fin patterning induced defects.

摘要

在本工作中，采用自上而下的策略制造了累积模式（AM）p沟道环绕栅FinFET和AM p沟道平面FET，并在6 K至295 K的温度范围内对其性能进行了比较。AM环绕栅FinFET的阈值电压变化略大于AM平面FET。AM环绕栅FinFET中的漏极电流和峰值跨导大于AM平面FET中的漏极电流和峰值跨导，且这些差异与温度有关。我们将这些归因于随着温度升高，AM环绕栅FinFET中的体电流增强。两种类型的FET的亚阈值摆幅（SS）都随着温度降低而改善，并且在6 K时低于10 mV/dec。AM环绕栅FinFET中较高的SS可能是由于鳍片图案化引起的缺陷导致鳍片侧壁处的界面态密度较高。