Gurun Gokce, Zahorian Jaime S, Sisman Alper, Karaman Mustafa, Hasler Paul E, Degertekin F Levent
Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA.
IEEE Trans Biomed Circuits Syst. 2012 Oct;6(5):454-67. doi: 10.1109/TBCAS.2012.2219532.
We designed and fabricated a dynamic receive beamformer integrated circuit (IC) in 0.35-μm CMOS technology. This beamformer IC is suitable for integration with an annular array transducer for high-frequency (30-50 MHz) intravascular ultrasound (IVUS) imaging. The beamformer IC consists of receive preamplifiers, an analog dynamic delay-and-sum beamformer, and buffers for 8 receive channels. To form an analog dynamic delay line we designed an analog delay cell based on the current-mode first-order all-pass filter topology, as the basic building block. To increase the bandwidth of the delay cell, we explored an enhancement technique on the current mirrors. This technique improved the overall bandwidth of the delay line by a factor of 6. Each delay cell consumes 2.1-mW of power and is capable of generating a tunable time delay between 1.75 ns to 2.5 ns. We successfully integrated the fabricated beamformer IC with an 8-element annular array. Experimental test results demonstrated the desired buffering, preamplification and delaying capabilities of the beamformer.
我们采用0.35-μm CMOS技术设计并制造了一种动态接收波束形成器集成电路（IC）。该波束形成器IC适用于与环形阵列换能器集成，用于高频（30-50 MHz）血管内超声（IVUS）成像。该波束形成器IC由接收前置放大器、模拟动态延迟求和波束形成器以及用于8个接收通道的缓冲器组成。为了形成模拟动态延迟线，我们设计了一种基于电流模式一阶全通滤波器拓扑的模拟延迟单元作为基本构建模块。为了增加延迟单元的带宽，我们探索了一种电流镜增强技术。该技术将延迟线的整体带宽提高了6倍。每个延迟单元消耗2.1 mW的功率，能够产生1.75 ns至2.5 ns的可调时间延迟。我们成功地将制造的波束形成器IC与8元件环形阵列集成。实验测试结果证明了波束形成器所需的缓冲、前置放大和延迟能力。
