Chen Man-Chia, Perez Aldo Peña, Kothapalli Sri-Rajasekhar, Cathelin Philippe, Cathelin Andreia, Gambhir Sanjiv Sam, Murmann Boris
Robert-Bosch Sensortec, Palo Alto, CA 94304 USA.
SLAC National Accelerator Laboratory, Menlo Park, CA 94025 USA.
IEEE J Solid-State Circuits. 2017 Nov;52(11):2843-2856. doi: 10.1109/JSSC.2017.2749425. Epub 2017 Oct 16.
This paper presents a pixel pitch-matched readout chip for 3-D photoacoustic (PA) imaging, featuring a dedicated signal conditioning and delta-sigma modulation integrated within a pixel area of 250 µm by 250 µm. The proof-of-concept receiver was implemented in an STMicroelectronics's 28-nm Fully Depleted Silicon On Insulator technology, and interfaces to a 4 × 4 subarray of capacitive micromachined ultrasound transducers (CMUTs). The front-end signal conditioning in each pixel employs a coarse/fine gain tuning architecture to fulfill the 90-dB dynamic range requirement of the application. The employed delta-sigma beamforming architecture obviates the need for area-consuming Nyquist ADCs and thereby enables an efficient in-pixel A/D conversion. The per-pixel switched-capacitor ΔΣ modulator leverages slewing-dominated and area-optimized inverter-based amplifiers. It occupies only 1/4th of the pixel, and its area compares favorably with state-of-the-art designs that offer the same SNR and bandwidth. The modulator's measured peak signal-to-noise-and-distortion ratio is 59.9 dB for a 10-MHz input bandwidth, and it consumes 6.65 mW from a 1-V supply. The overall subarray beamforming approach improves the area per channel by 7.4 times and the single-channel SNR by 8 dB compared to prior art with similar delay resolution and power dissipation. The functionality of the designed chip was evaluated within a PA imaging experiment, employing a flip-chip bonded 2-D CMUT array.
本文介绍了一种用于三维光声(PA)成像的像素间距匹配读出芯片,其特点是在250μm×250μm的像素区域内集成了专用的信号调理和delta-sigma调制。该概念验证接收器采用意法半导体的28纳米全耗尽绝缘体上硅技术实现,并与电容式微机械超声换能器(CMUT)的4×4子阵列接口。每个像素中的前端信号调理采用粗/细增益调谐架构,以满足该应用90dB的动态范围要求。所采用的delta-sigma波束形成架构无需占用大量面积的奈奎斯特ADC,从而实现了高效的像素内A/D转换。每个像素的开关电容ΔΣ调制器利用了以摆率为主且面积优化的基于反相器的放大器。它仅占用像素的四分之一,其面积与提供相同信噪比和带宽的最新设计相比具有优势。对于10MHz的输入带宽,该调制器测得的峰值信噪失真比为59.9dB,从1V电源汲取的功耗为6.65mW。与具有类似延迟分辨率和功耗的现有技术相比,整体子阵列波束形成方法将每通道面积提高了7.4倍,单通道信噪比提高了8dB。在PA成像实验中,采用倒装芯片键合的二维CMUT阵列对所设计芯片的功能进行了评估。