IEEE Trans Biomed Circuits Syst. 2015 Jun;9(3):370-6. doi: 10.1109/TBCAS.2014.2346761. Epub 2014 Sep 19.
An ASIC for wearable cardiovascular monitoring is implemented using a topology that takes advantage of the electrocardiogram's (ECG) waveform to replace the traditional ECG instrumentation amplifier, ADC, and signal processor with a single chip solution. The ASIC can extract heartbeat timings in the presence of baseline drift, muscle artifact, and signal clipping. The circuit can operate with ECGs ranging from the chest location to remote locations where the ECG magnitude is as low as 30 μV. Besides heartbeat detection, a midpoint estimation method can accurately extract the ECG R-wave timing, enabling the calculations of heart rate variability. With 58 nW of power consumption at 0.8 V supply voltage and 0.76 mm (2) of active die area in standard 0.18 μm CMOS technology, the ECG ASIC is sufficiently low power and compact to be suitable for long term and wearable cardiovascular monitoring applications under stringent battery and size constraints.
一款可穿戴心血管监测用的 ASIC 采用了一种拓扑结构，该结构利用心电图（ECG）的波形来取代传统的 ECG 仪表放大器、ADC 和信号处理器，实现了单芯片解决方案。该 ASIC 可以在存在基线漂移、肌肉伪影和信号削波的情况下提取心跳计时。该电路可以处理源自胸部位置或 ECG 幅度低至 30 μV 的远程位置的 ECG。除了心跳检测外，中点估计方法还可以准确提取 ECG R 波定时，从而实现心率变异性的计算。在标准 0.18 μm CMOS 技术中，该 ECG ASIC 在 0.8 V 供电电压下的功耗为 58 nW，有效芯片面积为 0.76 mm（2），功耗低且体积小，非常适合在严格的电池和尺寸限制下进行长期和可穿戴的心血管监测应用。
