School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University , West Lafayette, Indiana 47907, United States.
ACS Nano. 2014 Oct 28;8(10):10035-42. doi: 10.1021/nn502553m. Epub 2014 Oct 17.
Although monolayer black phosphorus (BP), or phosphorene, has been successfully exfoliated and its optical properties have been explored, most of the electrical performance of the devices is demonstrated on few-layer phosphorene and ultrathin BP films. In this paper, we study the channel length scaling of ultrathin BP field-effect transistors (FETs) and discuss a scheme for using various contact metals to change the transistor characteristics. Through studying transistor behaviors with various channel lengths, the contact resistance can be extracted with the transfer length method (TLM). With different contact metals, we find out that the metal/BP interface has different Schottky barrier heights, leading to a significant difference in contact resistance, which is quite different from previous studies of transition metal dichalcogenides (TMDs), such as MoS2, where the Fermi level is strongly pinned near the conduction band edge at the metal/MoS2 interface. The nature of BP transistors is Schottky barrier FETs, where the on and off states are controlled by tuning the Schottky barriers at the two contacts. We also observe the ambipolar characteristics of BP transistors with enhanced n-type drain current and demonstrate that the p-type carriers can be easily shifted to n-type or vice versa by controlling the gate bias and drain bias, showing the potential to realize BP CMOS logic circuits.
尽管单层黑磷 (BP) 或磷烯已成功被剥离出来,并对其光学性质进行了探索,但大多数器件的电学性能都是在少层磷烯和超薄 BP 薄膜上进行演示的。在本文中,我们研究了超薄 BP 场效应晶体管 (FET) 的沟道长度缩放,并讨论了使用各种接触金属来改变晶体管特性的方案。通过研究具有不同沟道长度的晶体管行为,可以通过传输长度法 (TLM) 提取接触电阻。通过使用不同的接触金属,我们发现金属/BP 界面具有不同的肖特基势垒高度,导致接触电阻有显著差异,这与之前对过渡金属二硫化物 (TMDs) 的研究,如 MoS2,有很大的不同,在 MoS2 中,金属/MoS2 界面处的费米能级被强烈钉扎在导带边缘附近。BP 晶体管的性质是肖特基势垒 FET,其导通和关断状态是通过调节两个接触处的肖特基势垒来控制的。我们还观察到了 BP 晶体管的双极性特性,增强了 n 型漏极电流,并证明通过控制栅极偏压和漏极偏压,很容易将 p 型载流子转换为 n 型或反之,这显示了实现 BP CMOS 逻辑电路的潜力。