Siddiqui Muhammad Faisal, Reza Ahmed Wasif, Shafique Abubakr, Omer Hammad, Kanesan Jeevan
Faculty of Engineering, Department of Electrical Engineering, University of Malaya, Kuala Lumpur, Malaysia; Department of Electrical Engineering, COMSATS Institute of Information Technology, Islamabad, Pakistan.
Department of Computer Science & Engineering, Faculty of Science & Engineering, East West University, Dhaka 1212, Bangladesh.
Magn Reson Imaging. 2017 Dec;44:82-91. doi: 10.1016/j.mri.2017.08.005. Epub 2017 Aug 30.
Sensitivity Encoding (SENSE) is a widely used technique in Parallel Magnetic Resonance Imaging (MRI) to reduce scan time. Reconfigurable hardware based architecture for SENSE can potentially provide image reconstruction with much less computation time. Application specific hardware platform for SENSE may dramatically increase the power efficiency of the system and can decrease the execution time to obtain MR images. A new implementation of SENSE on Field Programmable Gate Array (FPGA) is presented in this study, which provides real-time SENSE reconstruction right on the receiver coil data acquisition system with no need to transfer the raw data to the MRI server, thereby minimizing the transmission noise and memory usage. The proposed SENSE architecture can reconstruct MR images using receiver coil sensitivity maps obtained using pre-scan and eigenvector (E-maps) methods. The results show that the proposed system consumes remarkably less computation time for SENSE reconstruction, i.e., 0.164ms @ 200MHz, while maintaining the quality of the reconstructed images with good mean SNR (29+ dB), less RMSE (<5×10) and comparable artefact power (<9×10) to conventional SENSE reconstruction. A comparison of the center line profiles of the reconstructed and reference images also indicates a good quality of the reconstructed images. Furthermore, the results indicate that the proposed architectural design can prove to be a significant tool for SENSE reconstruction in modern MRI scanners and its low power consumption feature can be remarkable for portable MRI scanners.
灵敏度编码（SENSE）是并行磁共振成像（MRI）中广泛使用的一种技术，用于减少扫描时间。基于可重构硬件的SENSE架构有可能以更少的计算时间提供图像重建。针对SENSE的专用硬件平台可能会显著提高系统的功率效率，并能减少获取MR图像的执行时间。本研究提出了一种在现场可编程门阵列（FPGA）上实现SENSE的新方法，该方法可在接收线圈数据采集系统上直接进行实时SENSE重建，无需将原始数据传输到MRI服务器，从而将传输噪声和内存使用降至最低。所提出的SENSE架构可以使用通过预扫描和特征向量（E图）方法获得的接收线圈灵敏度图来重建MR图像。结果表明，所提出的系统在进行SENSE重建时消耗的计算时间显著减少，即在200MHz时为0.164ms，同时在保持重建图像质量的情况下，具有良好的平均信噪比（29+dB）、更低的均方根误差（<5×10）以及与传统SENSE重建相当的伪影功率（<9×10）。对重建图像和参考图像中心线轮廓的比较也表明重建图像质量良好。此外，结果表明所提出的架构设计可成为现代MRI扫描仪中SENSE重建的重要工具，其低功耗特性对于便携式MRI扫描仪而言可能非常显著。
