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用于低压场效应晶体管的电纺 p 型氧化镍半导体纳米线。

Electrospun p-Type Nickel Oxide Semiconducting Nanowires for Low-Voltage Field-Effect Transistors.

机构信息

College of Physics , Qingdao University , Qingdao 266071 , China.

College of Electronic & Information Engineering , Qingdao University , Qingdao 266071 , China.

出版信息

ACS Appl Mater Interfaces. 2018 Aug 8;10(31):25841-25849. doi: 10.1021/acsami.7b08794. Epub 2017 Oct 2.

Abstract

One-dimensional metal-oxide nanowires are regarded as important building blocks in nanoscale electronics, because of their unique mechanical and electrical properties. In this work, p-type nickel oxide nanowires (NiO NWs) were fabricated by combining sol-gel and electrospinning processes. The poly(vinylpyrrolidone) (PVP) with a molecular weight of 1 300 000 was used as the polymer matrix to increase the viscosity of a NiO precursor solution. The formation and properties of the as-spun NiO/PVP composite NWs before/after calcination treatment were investigated using various techniques. Because of the enhanced adhesion properties between ultraviolet (UV)-treated NiO NWs and the substrate, the field-effect transistors (FETs) based on NiO NWs were found to exhibit satisfying p-channel behaviors. For the fabrication of aligned NiO NW arrays, two parallel conducting Si strips were grounded as NW collector. The integrated FETs based on aligned NiO NWs were demonstrated to exhibit superior electrical performance, compared to the disordered counterparts with the comparable NW coverage. By employing high- k aluminum oxide (AlO) as a dielectric layer, instead of conventional SiO, the devices with an aligned NiO NW array exhibit a high hole mobility of 2.8 cm/(V s) with a low operating voltage of 5 V, fast switching speed, and successful modulation of light emission over external light-emitting diodes. To the best of our knowledge, this is the first work demonstrating the low-voltage transistors based on p-type oxide NWs, which represents a great step toward the development of sensors and CMOS logic circuits.

摘要

一维金属氧化物纳米线因其独特的机械和电学性能而被视为纳米电子学中的重要构建块。在这项工作中,通过溶胶-凝胶法和静电纺丝工艺相结合制备了 p 型氧化镍纳米线(NiO NWs)。使用分子量为 1300000 的聚(N-乙烯基吡咯烷酮)(PVP)作为聚合物基体,以增加 NiO 前体溶液的粘度。使用各种技术研究了未经煅烧和煅烧处理后的纺丝 NiO/PVP 复合 NW 的形成和性能。由于经紫外(UV)处理的 NiO NW 与基底之间增强的粘附性能,基于 NiO NW 的场效应晶体管(FET)表现出令人满意的 p 型沟道行为。为了制备对齐的 NiO NW 阵列,将两条平行的导电 Si 条作为 NW 集电极接地。与具有可比 NW 覆盖率的无序对应物相比,基于对齐的 NiO NW 的集成 FET 表现出优异的电性能。通过采用高 k 氧化铝(AlO)而不是传统的 SiO2 作为介电层,器件具有高达 2.8 cm/(V s)的空穴迁移率,工作电压低至 5 V,开关速度快,并且可以成功地通过外部发光二极管对光发射进行调制。据我们所知,这是首次报道基于 p 型氧化物 NW 的低压晶体管,这是朝着开发传感器和 CMOS 逻辑电路迈出的重要一步。

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