Hewlett Packard Labs, Hewlett Packard Enterprise, Palo Alto, CA, 94304, USA.
Department of Electrical and Computer Engineering, University of Massachusetts, Amherst, MA, 01003, USA.
Adv Mater. 2018 Mar;30(9). doi: 10.1002/adma.201705914. Epub 2018 Jan 10.
Using memristor crossbar arrays to accelerate computations is a promising approach to efficiently implement algorithms in deep neural networks. Early demonstrations, however, are limited to simulations or small-scale problems primarily due to materials and device challenges that limit the size of the memristor crossbar arrays that can be reliably programmed to stable and analog values, which is the focus of the current work. High-precision analog tuning and control of memristor cells across a 128 × 64 array is demonstrated, and the resulting vector matrix multiplication (VMM) computing precision is evaluated. Single-layer neural network inference is performed in these arrays, and the performance compared to a digital approach is assessed. Memristor computing system used here reaches a VMM accuracy equivalent of 6 bits, and an 89.9% recognition accuracy is achieved for the 10k MNIST handwritten digit test set. Forecasts show that with integrated (on chip) and scaled memristors, a computational efficiency greater than 100 trillion operations per second per Watt is possible.
使用忆阻器交叉阵列来加速计算是一种很有前途的方法，可以有效地在深度神经网络中实现算法。然而，早期的演示主要局限于模拟或小规模问题，这主要是由于材料和器件挑战限制了可以可靠编程到稳定和模拟值的忆阻器交叉阵列的大小，这是当前工作的重点。本文演示了在 128×64 阵列中对忆阻器单元进行高精度的模拟调谐和控制，并评估了由此产生的向量矩阵乘法（VMM）计算精度。在这些阵列中进行了单层神经网络推断，并评估了与数字方法的性能比较。这里使用的忆阻计算系统达到了相当于 6 位的 VMM 精度，对于 10k MNIST 手写数字测试集，实现了 89.9%的识别精度。预测表明，通过集成（片上）和缩放的忆阻器，每瓦每秒超过 100 万亿次运算的计算效率是可能的。
