Department of Electronic and Electrical Engineering, Sungkyunkwan University, Suwon-si, 16419, Republic of Korea.
Samsung Advanced Institute of Technology, Suwon-si, Gyeonggi-do, 443-803, Republic of Korea.
Adv Mater. 2018 Mar;30(9). doi: 10.1002/adma.201704435. Epub 2018 Jan 15.
Vertical integration of 2D layered materials to form van der Waals heterostructures (vdWHs) offers new functional electronic and optoelectronic devices. However, the mobility in vertical carrier transport in vdWHs of vertical field-effect transistor (VFET) is not yet investigated in spite of the importance of mobility for the successful application of VFETs in integrated circuits. Here, the mobility in VFET of vdWHs under different drain biases, gate biases, and metal work functions is first investigated and engineered. The traps in WSe are the main source of scattering, which influences the vertical mobility and three distinct transport mechanisms: Ohmic transport, trap-limited transport, and space-charge-limited transport. The vertical mobility in VFET can be improved by suppressing the trap states by raising the Fermi level of WSe . This is achieved by increasing the injected carrier density by applying a high drain voltage, or decreasing the Schottky barrier at the graphene/WSe and metal/WSe junctions by applying a gate bias and reducing the metal work function, respectively. Consequently, the mobility in Mn vdWH at +50 V gate voltage is about 76 times higher than the initial mobility of Au vdWH. This work enables further improvements in the VFET for successful application in integrated circuits.
二维层状材料的垂直集成形成范德华异质结（vdWHs）为新型功能电子和光电子器件提供了可能。然而，尽管垂直场效应晶体管（VFET）在集成电路中的应用成功取决于迁移率，但垂直 vdWH 中的垂直载流子输运的迁移率尚未得到研究。在这里，首次研究并设计了不同漏极偏压、栅极偏压和金属功函数下 vdWHs 中 VFET 的迁移率。WSe 中的陷阱是散射的主要来源，这会影响垂直迁移率和三种不同的输运机制：欧姆输运、陷阱限制输运和空间电荷限制输运。通过提高 WSe 的费米能级，可以抑制陷阱态，从而提高 VFET 的垂直迁移率。这可以通过施加高漏极电压来增加注入载流子密度，或者通过施加栅极偏压来降低石墨烯/WSe 和金属/WSe 结处的肖特基势垒，或者通过降低金属功函数来实现。因此，在+50 V 栅极电压下，Mn vdWH 的迁移率大约是 Au vdWH 初始迁移率的 76 倍。这项工作为 VFET 在集成电路中的成功应用提供了进一步的改进。
