Hashim Yasir
Faculty of Engineering Technology, University Malaysia Pahang (UMP), Lebuhraya Tun Razak, 26300, Pahang, Malaysia.
J Nanosci Nanotechnol. 2018 Feb 1;18(2):1199-1201. doi: 10.1166/jnn.2018.13956.
This study explores optimization of resistance load (R-Load) of four silicon nanowire transistor (SiNWT)-based static random-access memory (SRAM) cell. Noise margins and inflection voltage of butterfly characteristics with static power consumption of SRAM cell are used as limiting factors in this optimization. Range of R-Load used in this study was 20-1000 KΩ with Vdd = 1 V. Results indicate that optimization depends critically on resistance load value. The optimized range of R-Load is 100-200 KΩ.
本研究探讨了基于四个硅纳米线晶体管（SiNWT）的静态随机存取存储器（SRAM）单元的电阻负载（R-Load）优化问题。SRAM单元静态功耗下的噪声容限和蝴蝶特性的拐点电压被用作该优化中的限制因素。本研究中使用的R-Load范围为20 - 1000千欧，Vdd = 1伏。结果表明，优化在很大程度上取决于电阻负载值。R-Load的优化范围是100 - 200千欧。
