Liu Chen, Bellec Guillaume, Vogginger Bernhard, Kappel David, Partzsch Johannes, Neumärker Felix, Höppner Sebastian, Maass Wolfgang, Furber Steve B, Legenstein Robert, Mayr Christian G
Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Department of Electrical Engineering and Information Technology, Institute of Circuits and Systems, Technische Universität Dresden, Dresden, Germany.
Institute for Theoretical Computer Science, Graz University of Technology, Graz, Austria.
Front Neurosci. 2018 Nov 16;12:840. doi: 10.3389/fnins.2018.00840. eCollection 2018.
The memory requirement of deep learning algorithms is considered incompatible with the memory restriction of energy-efficient hardware. A low memory footprint can be achieved by pruning obsolete connections or reducing the precision of connection strengths after the network has been trained. Yet, these techniques are not applicable to the case when neural networks have to be trained directly on hardware due to the hard memory constraints. Deep Rewiring (DEEP R) is a training algorithm which continuously rewires the network while preserving very sparse connectivity all along the training procedure. We apply DEEP R to a deep neural network implementation on a prototype chip of the 2nd generation SpiNNaker system. The local memory of a single core on this chip is limited to 64 KB and a deep network architecture is trained entirely within this constraint without the use of external memory. Throughout training, the proportion of active connections is limited to 1.3%. On the handwritten digits dataset MNIST, this extremely sparse network achieves 96.6% classification accuracy at convergence. Utilizing the multi-processor feature of the SpiNNaker system, we found very good scaling in terms of computation time, per-core memory consumption, and energy constraints. When compared to a X86 CPU implementation, neural network training on the SpiNNaker 2 prototype improves power and energy consumption by two orders of magnitude.
深度学习算法的内存需求被认为与节能硬件的内存限制不兼容。在网络训练完成后,通过修剪过时的连接或降低连接强度的精度,可以实现较低的内存占用。然而,由于严格的内存限制,当神经网络必须直接在硬件上进行训练时,这些技术并不适用。深度重布线(DEEP R)是一种训练算法,在整个训练过程中,它会不断地对网络进行重布线,同时保持非常稀疏的连接性。我们将深度重布线应用于第二代SpiNNaker系统的原型芯片上的深度神经网络实现。该芯片上单个内核的本地内存限制为64 KB,并且在不使用外部内存的情况下,在这个限制范围内对深度网络架构进行了完整的训练。在整个训练过程中,活跃连接的比例限制在1.3%。在手写数字数据集MNIST上,这个极其稀疏的网络在收敛时达到了96.6%的分类准确率。利用SpiNNaker系统的多处理器特性,我们发现在计算时间、每内核内存消耗和能量限制方面具有非常好的扩展性。与X86 CPU实现相比,在SpiNNaker 2原型上进行神经网络训练可将功耗和能量消耗降低两个数量级。