He Zhen-Yu, Wang Tian-Yu, Chen Lin, Zhu Hao, Sun Qing-Qing, Ding Shi-Jin, Zhang David Wei
State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, 200433, China.
Nanoscale Res Lett. 2019 Feb 7;14(1):51. doi: 10.1186/s11671-019-2875-4.
With Moore's law closing to its physical limit, traditional von Neumann architecture is facing a challenge. It is expected that the computing in-memory architecture-based resistive random access memory (RRAM) could be a potential candidate to overcome the von Neumann bottleneck problem of traditional computers [Backus, J, Can programming be liberated from the von Neumann style?, 1977]. In this work, HfAlOx-based RRAM which is compatible with CMOS technology was fabricated by an atomic layer deposition (ALD) process. Metal Ag and TaN are selected as top electrodes (TE). Experiments show that the Ag/HfAlOx/Pt device has demonstrated advantages as a memory-computing device because of the low set voltage (0.33~0.6 V) which means low power consumption and good uniformity. Based on a Ag/HfAlOx/Pt structure, IMP logic was implemented at high speed by applying a 100-ns high-frequency low-voltage pulse (0.3 V and 0.6 V). After two steps of IMP implementation, NAND can also be obtained.
随着摩尔定律接近其物理极限,传统的冯·诺依曼架构正面临挑战。预计基于计算内存储架构的电阻式随机存取存储器(RRAM)可能是克服传统计算机冯·诺依曼瓶颈问题的潜在候选方案[巴克斯,J,《编程能否从冯·诺依曼风格中解放出来?》,1977年]。在这项工作中,通过原子层沉积(ALD)工艺制造了与CMOS技术兼容的基于HfAlOx的RRAM。选择金属Ag和TaN作为顶部电极(TE)。实验表明,Ag/HfAlOx/Pt器件作为一种存储计算器件具有优势,因为其低设置电压(0.33~0.6V)意味着低功耗和良好的均匀性。基于Ag/HfAlOx/Pt结构,通过施加100纳秒的高频低压脉冲(0.3V和0.6V)高速实现了IMP逻辑。经过两步IMP实现后,也可以获得与非门。