Cummins Cian, Borah Dipu, Rasappa Sozaraj, Senthamaraikannan Ramsankar, Simao Claudia, Francone Achille, Kehagias Nikolaos, Sotomayor-Torres Clivia M, Morris Michael A
AMBER Centre and CRANN, Trinity College Dublin, Dublin 2, Ireland.
Optoelectronics Research Center, Tampere University of Technology, P.O. Box 692, FI-33101 Tampere, Finland.
ACS Omega. 2017 Aug 10;2(8):4417-4423. doi: 10.1021/acsomega.7b00781. eCollection 2017 Aug 31.
Achieving ultrasmall dimensions of materials and retaining high throughput are critical fabrication considerations for nanotechnology use. This article demonstrates an integrated approach for developing isolated sub-20 nm silicon oxide features through combined "top-down" and "bottom-up" methods: nanoimprint lithography (NIL) and block copolymer (BCP) lithography. Although techniques like those demonstrated here have been developed for nanolithographic application in the microelectronics processing industry, similar approaches could be utilized for sensor, fluidic, and optical-based devices. Thus, this article centers on looking at the possibility of generating isolated silica structures on substrates. NIL was used to create intriguing three-dimensional (3-D) polyhedral oligomeric silsesquioxane (POSS) topographical arrays that guided and confined polystyrene--poly(dimethylsiloxane) (PS--PDMS) BCP nanofeatures in isolated regions. A cylinder forming PS--PDMS BCP system was successfully etched using a one-step etching process to create line-space arrays with a period of 35 nm in confined POSS arrays. We highlight large-area (>6 μm) coverage of line-space arrays in 3-D topographies that could potentially be utilized, for example, in nanofluidic systems. Aligned features for directed self-assembly application are also demonstrated. The high-density, confined silicon oxide nanofeatures in soft lithographic templates over macroscopic areas illustrate the advantages of integrating distinct lithographic methods for attaining discrete features in the deep nanoscale regime.
实现材料的超小尺寸并保持高产量是纳米技术应用中关键的制造考量因素。本文展示了一种通过结合“自上而下”和“自下而上”方法（纳米压印光刻（NIL）和嵌段共聚物（BCP）光刻）来开发孤立的亚20纳米氧化硅特征的集成方法。尽管此处展示的这类技术已被开发用于微电子加工行业的纳米光刻应用，但类似方法也可用于基于传感器、流体和光学的器件。因此，本文重点探讨在衬底上生成孤立二氧化硅结构的可能性。NIL用于创建有趣的三维（3-D）多面体低聚倍半硅氧烷（POSS）拓扑阵列，该阵列在孤立区域引导并限制聚苯乙烯 - 聚（二甲基硅氧烷）（PS - PDMS）BCP纳米特征。使用一步蚀刻工艺成功蚀刻了形成圆柱体的PS - PDMS BCP系统，以在受限的POSS阵列中创建周期为35纳米的线间距阵列。我们强调了在三维拓扑结构中大面积（>6μm）的线间距阵列覆盖，例如可潜在地用于纳米流体系统。还展示了用于定向自组装应用的对齐特征。在宏观区域的软光刻模板中高密度、受限的氧化硅纳米特征说明了整合不同光刻方法以在深纳米尺度范围内获得离散特征的优势。
