University of Chinese Academy of Sciences, the High-Frequency High-Voltage Device and Integrated Circuits R&D Center, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, People's Republic of China. Department of Materials Science and Engineering, Nanchang University, 999 Xuefu Avenue, Nanchang 330031, People's Republic of China.
Nanotechnology. 2020 Jan 24;31(5):055707. doi: 10.1088/1361-6528/ab49b8. Epub 2019 Oct 1.
Wrinkle-free transfer of chemical vapor deposition (CVD) synthesized 2D MoS is a prerequisite for large-area high-performance device fabrication. The surface-energy-assisted transfer method is a suitable method for MoS transfer, which greatly reduces the damage to the MoS. However, in the process of tiling the MoS to the new substrate, droplets are sandwiched between the MoS and substrate, which are difficult to remove and easily cause wrinkles and cracks. To avoid the realization of wrinkles and cracks in the transfer, we developed a modified surface-energy-assisted transfer method that modifies the spreading parameter S of residual droplets sandwiched between the MoS and substrate. By using this strategy, the liquids were easily to remove from the MoS/substrate interface resulting in a smooth MoS film with no wrinkles. Larger area back-gated field-effect transistor (FET) arrays were also fabricated based on the transferred monolayer MoS (10 × 10 mm) with atomic layer deposition prepared HfO as the high-k gate insulator. The FETs exhibited a high on/off ratio of 10 and carrier mobility up to 118 cm V s, which is the highest mobility values reported for back-gate transistors fabricated with CVD synthesized MoS. This transfer method provides a useful strategy for the fabrication of larger area high property FETs on MoS.
无褶皱的化学气相沉积(CVD)合成二维 MoS 的转移是大面积高性能器件制造的前提。表面能辅助转移法是 MoS 转移的一种合适方法,可大大减少 MoS 的损伤。然而,在将 MoS 平铺到新基底的过程中,液滴夹在 MoS 和基底之间,难以去除,容易导致褶皱和裂纹。为避免转移过程中出现褶皱和裂纹,我们开发了一种改进的表面能辅助转移方法,该方法可以修改 MoS 和基底之间夹着的残余液滴的铺展参数 S。通过使用这种策略,液体很容易从 MoS/基底界面去除,从而得到没有褶皱的光滑 MoS 薄膜。基于原子层沉积制备的 HfO 作为高 k 栅介电层的转移单层 MoS(10×10mm),还制备了更大面积的背栅场效应晶体管(FET)阵列。FET 表现出高达 10 的高开关比和高达 118cmV s 的载流子迁移率,这是用 CVD 合成的 MoS 制备的背栅晶体管报道的最高迁移率值。这种转移方法为 MoS 上更大面积高性能 FET 的制造提供了一种有用的策略。