Brown Benjamin J
Centre for Engineered Quantum Systems, School of Physics, University of Sydney, Sydney, New South Wales 2006, Australia. Email:
Sci Adv. 2020 May 22;6(21):eaay4929. doi: 10.1126/sciadv.aay4929. eCollection 2020 May.
Fault-tolerant logic gates will consume a large proportion of the resources of a two-dimensional quantum computing architecture. Here we show how to perform a fault-tolerant non-Clifford gate with the surface code; a quantum error-correcting code now under intensive development. This alleviates the need for distillation or higher-dimensional components to complete a universal gate set. The operation uses both local transversal gates and code deformations over a time that scales with the size of the qubit array. An important component of the gate is a just-in-time decoder. These decoding algorithms allow us to draw upon the advantages of three-dimensional models using only a two-dimensional array of live qubits. Our gate is completed using parity checks of weight no greater than four. We therefore expect it to be amenable with near-future technology. As the gate circumvents the need for magic-state distillation, it may reduce the resource overhead of surface-code quantum computation considerably.
容错逻辑门会消耗二维量子计算架构的很大一部分资源。在此,我们展示了如何利用表面码执行一个容错非克利福德门;表面码是一种目前正在大力研发的量子纠错码。这减轻了对蒸馏或更高维组件来完成通用门集的需求。该操作在与量子比特阵列大小成比例的时间内,同时使用局部横向门和码变形。该门的一个重要组件是即时解码器。这些解码算法使我们能够仅使用二维活跃量子比特阵列来利用三维模型的优势。我们的门通过权重不大于四的奇偶校验来完成。因此,我们预计它适用于近期技术。由于该门无需魔法态蒸馏,它可能会大幅降低表面码量子计算的资源开销。