Pirnaci Massimo D, Spitaleri Luca, Tenaglia Dario, Perricelli Francesco, Fragalà Maria Elena, Bongiorno Corrado, Gulino Antonino
STMicroelectronics, Stradale Primosole, 50, 95121 Catania, Italy.
Department of Chemical Sciences, University of Catania, Viale Andrea Doria 6, 95125 Catania, Italy.
ACS Omega. 2021 Jul 28;6(31):20667-20675. doi: 10.1021/acsomega.1c02905. eCollection 2021 Aug 10.
Silicon carbide power semiconductors overcome some limitations of silicon chips, and therefore, SiC is an attractive candidate for next-generation power electronics. In addition, the number of possible vertical devices that can be obtained on a given surface using the trench technique is significantly larger than that attainable using a planar setup. Moreover, a SiC trench power metal oxide semiconductor field-effect transistor (power MOSFET) structure removes the junction field-effect transistor (JFET) region (that would decrease the current flow width) and improves the channel density, thus reducing the specific electrical resistance. Consequently, in the present study, we report on the chemical bonding state of elements and structural characterization of trenches, obtained using SF-based plasma etching, on the 4H-SiC polytype substrate. An interferometric algorithm that finds the endpoint to stop etching governed the trench depth. Scanning electron microscopy, transmission electron microscopy, atomic force microscopy, and X-ray photoelectron spectroscopy analyses stated the high quality and uniformity of the trenches. These materials are particularly promising for the fabrication of the SiC MOSFET to be implemented in the manufacturing of power devices.
碳化硅功率半导体克服了硅芯片的一些局限性，因此，碳化硅是下一代功率电子学的一个有吸引力的候选材料。此外，使用沟槽技术在给定表面上可获得的垂直器件数量明显多于使用平面设置所能达到的数量。而且，碳化硅沟槽功率金属氧化物半导体场效应晶体管（功率MOSFET）结构去除了结型场效应晶体管（JFET）区域（该区域会减小电流流动宽度）并提高了沟道密度，从而降低了比电阻。因此，在本研究中，我们报告了在4H-SiC多型衬底上使用基于SF的等离子体蚀刻获得的沟槽的元素化学键合状态和结构表征。一种找到蚀刻终点以停止蚀刻的干涉算法控制着沟槽深度。扫描电子显微镜、透射电子显微镜、原子力显微镜和X射线光电子能谱分析表明了沟槽的高质量和均匀性。这些材料对于制造将用于功率器件制造的碳化硅MOSFET特别有前景。
