Huang Pei-Chen, Lee Chang-Chun
Department of Power Mechanical Engineering, National Tsing Hua University, No. 101, Section 2, Kuang-Fu Road, Hsinchu 30013, Taiwan.
Materials (Basel). 2021 Sep 11;14(18):5226. doi: 10.3390/ma14185226.
Stress-induced performance change in electron packaging architecture is a major concern when the keep-out zone (KOZ) and corresponding integration density of interconnect systems and transistor devices are considered. In this study, a finite element analysis (FEA)-based submodeling approach is demonstrated to analyze the stress-affected zone of through-silicon via (TSV) and its influences on a planar metal oxide semiconductor field transistor (MOSFET) device. The feasibility of the widely adopted analytical solution for TSV stress-affected zone estimation, Lamé radial stress solution, is investigated and compared with the FEA-based submodeling approach. Analytic results reveal that the Lamé stress solution overestimates the TSV-induced stress in the concerned device by over 50%, and the difference in the estimated results of device performance between Lamé stress solution and FEA simulation can reach 22%. Moreover, a silicon-germanium-based lattice mismatch stressor is designed in a silicon p-type MOSFET, and its effects are analyzed and compared with those of TSV residual stress. The S/D stressor dominates the stress status of the device channel. The demonstrated FEA-based submodeling approach is effective in analyzing the stress impact from packaging and device-level components and estimating the KOZ issue in advanced electronic packaging.
当考虑互连系统和晶体管器件的禁止布线区（KOZ）及相应的集成密度时，电子封装架构中应力诱导的性能变化是一个主要问题。在本研究中，展示了一种基于有限元分析（FEA）的子模型方法，用于分析硅通孔（TSV）的应力影响区及其对平面金属氧化物半导体场效应晶体管（MOSFET）器件的影响。研究了广泛采用的用于估计TSV应力影响区的解析解——拉梅径向应力解的可行性，并将其与基于FEA的子模型方法进行比较。分析结果表明，拉梅应力解在相关器件中对TSV诱导应力的高估超过50%，拉梅应力解与FEA模拟在器件性能估计结果上的差异可达22%。此外，在硅p型MOSFET中设计了一种基于硅锗的晶格失配应力源，并分析了其影响，并与TSV残余应力的影响进行比较。源漏应力源主导着器件沟道的应力状态。所展示的基于FEA的子模型方法在分析封装和器件级组件的应力影响以及估计先进电子封装中的KOZ问题方面是有效的。
