Gouzien Élie, Sangouard Nicolas
Université Paris-Saclay, CEA, CNRS, Institut de Physique Théorique, 91191 Gif-sur-Yvette, France.
Phys Rev Lett. 2021 Oct 1;127(14):140503. doi: 10.1103/PhysRevLett.127.140503.
We analyze the performance of a quantum computer architecture combining a small processor and a storage unit. By focusing on integer factorization, we show a reduction by several orders of magnitude of the number of processing qubits compared with a standard architecture using a planar grid of qubits with nearest-neighbor connectivity. This is achieved by taking advantage of a temporally and spatially multiplexed memory to store the qubit states between processing steps. Concretely, for a characteristic physical gate error rate of 10^{-3}, a processor cycle time of 1 microsecond, factoring a 2 048-bit RSA integer is shown to be possible in 177 days with 3D gauge color codes assuming a threshold of 0.75% with a processor made with 13 436 physical qubits and a memory that can store 28 million spatial modes and 45 temporal modes with 2 hours' storage time. By inserting additional error-correction steps, storage times of 1 second are shown to be sufficient at the cost of increasing the run-time by about 23%. Shorter run-times (and storage times) are achievable by increasing the number of qubits in the processing unit. We suggest realizing such an architecture using a microwave interface between a processor made with superconducting qubits and a multiplexed memory using the principle of photon echo in solids doped with rare-earth ions.
我们分析了一种结合小型处理器和存储单元的量子计算机架构的性能。通过专注于整数分解,我们表明,与使用具有最近邻连接的量子比特平面网格的标准架构相比,处理量子比特的数量减少了几个数量级。这是通过利用时间和空间复用存储器在处理步骤之间存储量子比特状态来实现的。具体而言,对于特征物理门错误率为10⁻³、处理器周期时间为1微秒的情况,假设阈值为0.75%,使用由13436个物理量子比特制成的处理器以及能够存储2800万个空间模式和45个时间模式且存储时间为2小时的存储器,采用3D规范色码在177天内分解一个2048位的RSA整数被证明是可能的。通过插入额外的纠错步骤,存储时间为1秒被证明是足够的,但运行时间会增加约23%。通过增加处理单元中的量子比特数量,可以实现更短的运行时间(和存储时间)。我们建议使用由超导量子比特制成的处理器与利用掺杂稀土离子的固体中的光子回波原理的复用存储器之间的微波接口来实现这样的架构。