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基于SPICE兼容模型的p型掺杂硅烯基场效应晶体管的器件性能分析

Device performances analysis of p-type doped silicene-based field effect transistor using SPICE-compatible model.

作者信息

Chuan Mu Wen, Riyadi Munawar Agus, Hamzah Afiq, Alias Nurul Ezaila, Mohamed Sultan Suhana, Lim Cheng Siong, Tan Michael Loong Peng

机构信息

School of Electrical Engineering, Faculty of Engineering, Universiti Teknologi Malaysia, Skudai, Johor, Malaysia.

Department of Electrical Engineering, Diponegoro University, Semarang, Indonesia.

出版信息

PLoS One. 2022 Mar 3;17(3):e0264483. doi: 10.1371/journal.pone.0264483. eCollection 2022.

DOI:10.1371/journal.pone.0264483
PMID:35239699
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC8893636/
Abstract

Moore's Law is approaching its end as transistors are scaled down to tens or few atoms per device, researchers are actively seeking for alternative approaches to leverage more-than-Moore nanoelectronics. Substituting the channel material of a field-effect transistors (FET) with silicene is foreseen as a viable approach for future transistor applications. In this study, we proposed a SPICE-compatible model for p-type (Aluminium) uniformly doped silicene FET for digital switching applications. The performance of the proposed device is benchmarked with various low-dimensional FETs in terms of their on-to-off current ratio, subthreshold swing and drain-induced barrier lowering. The results show that the proposed p-type silicene FET is comparable to most of the selected low-dimensional FET models. With its decent performance, the proposed SPICE-compatible model should be extended to the circuit-level simulation and beyond in future work.

摘要

随着晶体管缩小到每个器件只有几十个或几个原子,摩尔定律即将走到尽头,研究人员正在积极寻找替代方法来利用超越摩尔的纳米电子学。用硅烯替代场效应晶体管(FET)的沟道材料被认为是未来晶体管应用的一种可行方法。在本研究中,我们提出了一种用于数字开关应用的p型(铝)均匀掺杂硅烯FET的SPICE兼容模型。所提出器件的性能与各种低维FET在开/关电流比、亚阈值摆幅和漏极诱导势垒降低方面进行了基准测试。结果表明,所提出的p型硅烯FET与大多数选定的低维FET模型相当。凭借其良好的性能,所提出的SPICE兼容模型应在未来的工作中扩展到电路级模拟及其他方面。

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