Liu Shenghong, Wang Jing, Shao Jiefan, Ouyang Decai, Zhang Wenjing, Liu Shiyuan, Li Yuan, Zhai Tianyou
State Key Laboratory of Materials Processing and Die & Mould Technology, School of Materials Science and Engineering, Huazhong University of Science and Technology, Wuhan, 430074, P. R. China.
International Collaborative Laboratory of 2D Materials for Optoelectronics Science and Technology of Ministry of Education, Institute of Microscale Optoelectronics, Shenzhen University, Shenzhen, 518060, P. R. China.
Adv Mater. 2022 Dec;34(52):e2200734. doi: 10.1002/adma.202200734. Epub 2022 Oct 3.
With the reduction of feature size and increase of integration density, traditional 3D semiconductors are unable to meet the future requirements of chip integration. The current semiconductor fabrication technologies are approaching their physical limits based on Moore's law. 2D materials such as graphene, transitional metal dichalcogenides, etc., are of great promise for future memory, logic, and photonic devices due to their unique and excellent properties. To prompt 2D materials and devices from the laboratory research stage to the industrial integrated circuit-level, it is necessary to develop advanced nanopatterning methods to obtain high-quality, wafer-scale, and patterned 2D products. Herein, the recent development of nanopatterning technologies, particularly toward realizing large-scale practical application of 2D materials is reviewed. Based on the technological progress, the unique requirement and advances of the 2D integration process for logic, memory, and optoelectronic devices are further summarized. Finally, the opportunities and challenges of nanopatterning technologies of 2D materials for future integrated chip devices are prospected.
随着特征尺寸的减小和集成密度的增加，传统的三维半导体已无法满足未来芯片集成的需求。基于摩尔定律，当前的半导体制造技术正接近其物理极限。诸如石墨烯、过渡金属二硫属化物等二维材料，因其独特且优异的性能，在未来的存储器、逻辑器件和光子器件方面具有巨大潜力。为了推动二维材料和器件从实验室研究阶段迈向工业集成电路级别，有必要开发先进的纳米图案化方法，以获得高质量、晶圆级且有图案的二维产品。在此，综述了纳米图案化技术的最新进展，特别是在实现二维材料大规模实际应用方面的进展。基于技术进步，进一步总结了逻辑、存储器和光电器件二维集成工艺的独特要求和进展。最后，展望了二维材料纳米图案化技术在未来集成芯片器件中的机遇与挑战。
