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基于RRAM固有随机特性和P位复用策略的P位概率电路实现。

Probabilistic Circuit Implementation Based on P-Bits Using the Intrinsic Random Property of RRAM and P-Bit Multiplexing Strategy.

作者信息

Liu Yixuan, Hu Qiao, Wu Qiqiao, Liu Xuanzhi, Zhao Yulin, Zhang Donglin, Han Zhongze, Cheng Jinhui, Ding Qingting, Han Yongkang, Peng Bo, Jiang Haijun, Xue Xiaoyong, Lv Hangbing, Yang Jianguo

机构信息

Zhejiang Lab, Hangzhou 311121, China.

School of Microelectronics, Fudan University, Shanghai 200433, China.

出版信息

Micromachines (Basel). 2022 Jun 10;13(6):924. doi: 10.3390/mi13060924.

DOI:10.3390/mi13060924
PMID:35744538
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC9229847/
Abstract

Probabilistic computing is an emerging computational paradigm that uses probabilistic circuits to efficiently solve optimization problems such as invertible logic, where traditional digital computations are difficult to solve. This paper proposes a true random number generator (TRNG) based on resistive random-access memory (RRAM), which is combined with an activation function implemented by a piecewise linear function to form a standard p-bit cell, one of the most important parts of a p-circuit. A p-bit multiplexing strategy is also applied to reduce the number of p-bits and improve resource utilization. To verify the superiority of the proposed probabilistic circuit, we implement the invertible p-circuit on a field-programmable gate array (FPGA), including AND gates, full adders, multi-bit adders, and multipliers. The results of the FPGA implementation show that our approach can significantly save the consumption of hardware resources.

摘要

概率计算是一种新兴的计算范式,它使用概率电路来有效解决诸如可逆逻辑等传统数字计算难以解决的优化问题。本文提出了一种基于电阻式随机存取存储器(RRAM)的真随机数发生器(TRNG),该发生器与由分段线性函数实现的激活函数相结合,形成一个标准的p位单元,这是p电路最重要的部分之一。还应用了一种p位复用策略来减少p位的数量并提高资源利用率。为了验证所提出的概率电路的优越性,我们在现场可编程门阵列(FPGA)上实现了可逆p电路,包括与门、全加器、多位加法器和乘法器。FPGA实现的结果表明,我们的方法可以显著节省硬件资源的消耗。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/f6ade8ff6ae0/micromachines-13-00924-g009.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/2efa56f17395/micromachines-13-00924-g001.jpg
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https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/b2c75842fa37/micromachines-13-00924-g005.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/3bd73713e757/micromachines-13-00924-g006.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/b36cda02cd06/micromachines-13-00924-g007.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/e00cbe9fd559/micromachines-13-00924-g008.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/f6ade8ff6ae0/micromachines-13-00924-g009.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/2efa56f17395/micromachines-13-00924-g001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/cd6f037569b7/micromachines-13-00924-g002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/84f544295a7f/micromachines-13-00924-g003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/871d01588c2b/micromachines-13-00924-g004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/b2c75842fa37/micromachines-13-00924-g005.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/3bd73713e757/micromachines-13-00924-g006.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/b36cda02cd06/micromachines-13-00924-g007.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/e00cbe9fd559/micromachines-13-00924-g008.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f042/9229847/f6ade8ff6ae0/micromachines-13-00924-g009.jpg

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本文引用的文献

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Demonstration of Three True Random Number Generator Circuits Using Memristor Created Entropy and Commercial Off-the-Shelf Components.利用忆阻器产生的熵和商用现货组件演示三种真随机数发生器电路
Entropy (Basel). 2021 Mar 20;23(3):371. doi: 10.3390/e23030371.
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Nature. 2019 Sep;573(7774):390-393. doi: 10.1038/s41586-019-1557-9. Epub 2019 Sep 18.
3
Weighted p -Bits for FPGA Implementation of Probabilistic Circuits.用于概率电路FPGA实现的加权p比特
IEEE Trans Neural Netw Learn Syst. 2019 Jun;30(6):1920-1926. doi: 10.1109/TNNLS.2018.2874565. Epub 2018 Oct 30.
4
A novel true random number generator based on a stochastic diffusive memristor.一种基于随机扩散忆阻器的新型真随机数发生器。
Nat Commun. 2017 Oct 12;8(1):882. doi: 10.1038/s41467-017-00869-x.
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Hardware emulation of stochastic p-bits for invertible logic.用于可逆逻辑的随机 p 位硬件仿真。
Sci Rep. 2017 Sep 8;7(1):10994. doi: 10.1038/s41598-017-11011-8.
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Intrinsic optimization using stochastic nanomagnets.利用随机纳米磁铁进行内在优化。
Sci Rep. 2017 Mar 15;7:44370. doi: 10.1038/srep44370.