Singh Nihal Sanjay, Kobayashi Keito, Cao Qixuan, Selcuk Kemal, Hu Tianrui, Niazi Shaila, Aadit Navid Anjum, Kanai Shun, Ohno Hideo, Fukami Shunsuke, Camsari Kerem Y
Department of Electrical and Computer Engineering, University of California Santa Barbara, Santa Barbara, 93106, CA, USA.
Research Institute of Electrical Communication, Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai, 980-8577, Japan.
Nat Commun. 2024 Mar 27;15(1):2685. doi: 10.1038/s41467-024-46645-6.
Extending Moore's law by augmenting complementary-metal-oxide semiconductor (CMOS) transistors with emerging nanotechnologies (X) has become increasingly important. One important class of problems involve sampling-based Monte Carlo algorithms used in probabilistic machine learning, optimization, and quantum simulation. Here, we combine stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits (p-bits) with Field Programmable Gate Arrays (FPGA) to create an energy-efficient CMOS + X (X = sMTJ) prototype. This setup shows how asynchronously driven CMOS circuits controlled by sMTJs can perform probabilistic inference and learning by leveraging the algorithmic update-order-invariance of Gibbs sampling. We show how the stochasticity of sMTJs can augment low-quality random number generators (RNG). Detailed transistor-level comparisons reveal that sMTJ-based p-bits can replace up to 10,000 CMOS transistors while dissipating two orders of magnitude less energy. Integrated versions of our approach can advance probabilistic computing involving deep Boltzmann machines and other energy-based learning algorithms with extremely high throughput and energy efficiency.
通过利用新兴纳米技术（X）增强互补金属氧化物半导体（CMOS）晶体管来扩展摩尔定律变得越来越重要。一类重要的问题涉及概率机器学习、优化和量子模拟中使用的基于采样的蒙特卡罗算法。在这里，我们将基于随机磁隧道结（sMTJ）的概率位（p位）与现场可编程门阵列（FPGA）相结合，以创建一个节能的CMOS + X（X = sMTJ）原型。此设置展示了由sMTJ控制的异步驱动CMOS电路如何通过利用吉布斯采样的算法更新顺序不变性来执行概率推理和学习。我们展示了sMTJ的随机性如何增强低质量随机数生成器（RNG）。详细的晶体管级比较表明，基于sMTJ的p位可以替代多达10,000个CMOS晶体管，同时能耗降低两个数量级。我们方法的集成版本可以推进涉及深度玻尔兹曼机和其他基于能量的学习算法的概率计算，具有极高的吞吐量和能源效率。
